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AR# 65651

UltraScale RLDRAM3 - Read Latency of 17 is not a valid value for "-093E' parts

描述

Version Found: RLDRAM3 v1.0

Version Resolved: See (Xilinx Answer 69037)

When configuring the RLDRAM3 IP v1.0 in Vivado 2015.3, a Read Latency value of 17 can be selected when targeting RLDRAM3 parts with the "-093E" speed grade and using a targeted frequency between 938ps and 1070ps.

However, a Read Latency of 17 is not valid value as the RLDRAM3 IP v1.0 does not support 1200MHz parts at this time.

解决方案

Data errors will occur if a Read Latency of 17 is selected.

Please choose a different value.

Revision History:

10/12/2015 - Initial Release

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
69037 UltraScale/UltraScale+ RLDRAM3 - Release Notes and Known Issues N/A N/A
AR# 65651
日期 12/19/2017
状态 Active
Type 已知问题
器件
Tools
IP
的页面