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AR# 66426

Virtex UltraScale FPGA VCU108 Evaluation Board - Si570 Clock frequency at Power-Up

描述

UG1066 (v1.1) VCU108 Evaluation Board User Guide, Appendix C, outlines the following:

"Upon VCU108 board power-up, the onboard programmable clock sources generate their factory default frequencies. This happens until the system controller has booted and checked the onboard EEPROM to determine if a frequency value has previously been saved for either on-board clock source."

This is not working as expected.

When I follow the menu instructions in (UG1066) Appendix A to configure Si570 clock frequency, restoration is not happening as expected.

The clock frequency always defaults to 156.25MHz.

解决方案

This functionality is not enabled on the VCU108. For an UltraScale board, you will need to to reprogram the clock settings each time at board power-up.

The SI570 clock frequency will always default to 156.25 MHz on board power-up.

(UG1066) will be updated to reflect this information.

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
62603 Virtex UltraScale FPGA VCU108 评估套件 - 已知问题和发布说明主答复记录 N/A N/A
AR# 66426
日期 01/22/2016
状态 Active
Type 综合文章
器件
Boards & Kits
的页面