AR# 66576

JESD204 - Clock stability

描述

How important is clock stability for JESD204 designs?

解决方案

For JESD204 designs, clocks must be stable for the IP to work correctly. In particular, the clock needs to be stable when SYSREF is being sampled, otherwise clock skew might be observed. 

A good JESD204 design will hold everything in reset until clocks are stable.

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AR# 66576
日期 02/12/2016
状态 Active
Type 综合文章
IP