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AR# 66892

MIG 7 Series - DDR3 Custom part simulation may fail with Undefined variable: TDQSCK_DLLDIS

描述

Version Found: MIG 7 Series v2.4

Version Resolved: See (Xilinx Answer 54025)

The MIG example design fails with the following error when simulation is run for a custom part. No errors are seen when the MIG IP is generated with available parts from the memory part dropdown list.

** Error: ../../..mig_7series_1_example.srcs/sim_1/imports/sim/ddr3_model.sv(1958): (vlog-2730) Undefined variable: 'TDQSCK_DLLDIS'.

This error can happen when any of the parameters in the custom part wizard are modified to make a customized memory part.

解决方案

This is a known with custom part simulation.

As a work-around, comment out the definition of TDQSCK_DLLDIS in ddr3_model.sv, and delete its references.

Revision History:

28/03/2016 - Initial Release

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
54025 MIG 7 Series - IP Release Notes and Known Issues for Vivado N/A N/A
AR# 66892
日期 04/15/2016
状态 Active
Type 已知问题
器件
IP
的页面