AR# 67179

MIG 7 Series - Memory clock period range is updated in Vivado 2016.2 and may cause errors during IP upgrade

描述

If you are upgrading a MIG IP generated using older Vivado versions (any version prior to 2016.2) and its maximum frequency is updated in Vivado 2016.2, errors similar to the following might be seen in the console:

[xilinx.com:ip:mig_7series:4.0-0] mig_7series_0: - Memory Time Period (1875 PS) (533.333 MHz) is not supported for MIG. There has been a change in the allowed frequency ranges as described in Answer Record 67179. Instantiate and customize a new instance of MIG for your design

This is due to the updates made to MIG v4.0.

解决方案

Updates have been made to the frequency ranges for some configurations in the MIG IP in the 2016.2 release.

These were done to fully align with the datasheet and device supported speeds. We recommend following these guidelines for all new designs going forward.

If the above error occurs, create a new MIG IP from scratch in Vivado 2016.2, customize it as per your earlier IP settings and choose a new clock period within the allowed clock period range.

Designs requiring earlier clock periods should contact Xilinx Technical Support.

Revision History:

06/06/2016

AR# 67179
日期 06/08/2016
状态 Active
Type 综合文章
器件
IP