UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

JESD204 Solution Center

The JESD204 Solution Center is available to address all questions related to the JESD04 IP core and its associated PHY.

Whether you are starting a new design with JESD or troubleshooting a problem, use the JESD204 Solution Center to guide you to the correct information.

设计助手

JESD204 - Design Assistant

The JESD204 Design Assistant outlines JESD204 related debug information and steps to help you troubleshoot JESD204 related issues.

The JESD204 Design Assistant walks you through the recommended design flow for JESD204 while debugging commonly encountered problems such as data errors or loss of synch.

Note: This answer record is part of the Xilinx JESD204 Solution Center (Xilinx Answer 67300).


(Xilinx Answer 69895)JESD204 Solution Center - Design Assistant - Clocking
(Xilinx Answer 69884)JESD204 Solution Center - Design Assistant - Resets
(Xilinx Answer 69883)JESD204 Solution Center - Design Assistant - Link settings and initialization flow
(Xilinx Answer 69881)JESD204 Solution Center - Design Assistant - Simulation
(Xilinx Answer 69880)JESD204 Solution Center - Design Assistant - PHY settings
(Xilinx Answer 66354)JESD204 Solution Center - Design Assistant - General Debug Tips



技术文档

JESD204 Documentation

Please refer to the following documentation when using JESD204B IP core, JESD204C IP core, and JESD204 PHY.

Note: This Answer Record is part of the Xilinx JESD204 Solution Center (Xilinx Answer 67300).

The Xilinx JESD204 Solution Center is available to address all questions related to JESD204 IP.

Whether you are starting a new design with JESD204 or troubleshooting a problem, use the JESD204 Solution Center to guide you to the correct information.


PG066 JESD204B LogiCORE IP Product Guide:

See all versions:

https://www.xilinx.com/search/site-keyword-search.html#q=pg066

PG242 JESD204C LogiCORE IP Product Guide:

See all versions

https://www.xilinx.com/search/site-keyword-search.html#q=pg242

PG198 JESD204 PHY LogiCORE IP Product Guide

See all versions:

https://www.xilinx.com/search/site-keyword-search.html#q=pg198

Note: Make sure to select the version of the document that applies to the version of the core or PHY that you are using.

JESD204:

https://www.xilinx.com/products/intellectual-property/ef-di-jesd204.html

JESD204 PHY:

https://www.xilinx.com/products/intellectual-property/ef-di-jesd204-phy.html

JESD204 High Speed Interface:

https://www.xilinx.com/products/technology/high-speed-serial/jesd204-high-speed-interface.html

JESD204 Offerings and Software Requirements:

https://www.xilinx.com/products/intellectual-property/ef-di-jesd204/ef-di-jesd204-software-requirements.html


 


设计咨询

JESD204 设计咨询

本答复记录包含对现行设计至关重要的设计咨询。

可以选择 JESD204 设计咨询进入赛灵思提醒通知系统

更新您的 Xilinx 提示通知首选项,请访问:https://china.xilinx.com/support/myalerts

注:本答复记录是 Xilinx JESD204 解决方案(Xilinx Answer 67300)中心的一部分。


(Xilinx 答复 55366)面向 7 系列 FPGA GTX/GTH/GTP 收发器的设计咨询:收发器向导设置非最佳的 RX 端接使用模式
(Xilinx 答复 60489)7 系列FPGA 收发器向导 v3.2 或之前版本的设计咨询: GTH/GTP Production RX 重置序列停滞


常见问题

JESD204 Solution Center - Top Issues and Frequently Asked Questions

The following answer records cover current known issues as well as commonly asked questions related to JESD204 IP.

Note: This answer record is part of the Xilinx JESD204 Solution Center (Xilinx Answer 67300).


JESD204 LogiCORE IP Known Issues

(Xilinx Answer 44405)LogiCORE IP JESD204 - Release Notes and Known Issues
(Xilinx Answer 54480)LogiCORE IP JESD204B - Release Notes and Known Issues for Vivado 2013.1 and newer tools
(Xilinx Answer 68804)LogiCORE IP JESD204C - Release Notes and Known Issues


JESD204 PHY LogiCORE IP Known Issues

(Xilinx Answer 61911)LogiCORE IP JESD204 PHY core - Release Notes and Known Issues

的页面