Which pins can be swapped on a Zynq UltraScale+ PS DRAM interface?
A byte lane includes any signals associated with the aligned 8-bits of DQ, such as DM, DQS, DQS_N, DBI and DQ signals.
Information on Zynq UltraScale+ PS DDR pin swapping can be found in (UG1075) - Zynq UltraScale+ MPSoC Packaging and Pinouts Product SpecificationAR# 67330 | |
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日期 | 03/03/2017 |
状态 | Active |
Type | 综合文章 |
器件 | |
IP |