AR# 67367

UltraScale RLDRAM3 - when targeting 576Mb and 1.125Gb x36 parts an extra address bit exists on the pin out


Version Found: RLDRAM3 v1.2

Version Resolved: See (Xilinx Answer 69037)

The RLDRAM3 IP incorrectly generates 20 address bits for 576Mb x36 parts and 21 address bits for 1.125Gb x36 parts which only requires 19 and 20 address bits respectively.

This causes problems during implementation and I/O Planning because the RLDRAM3 component does not physically have that many address bits.


To work around this issue, please create a Custom Memory Part using the import CSV flow in the IP GUI with the correct number of address bits specified.

Refer to (Xilinx Answer 63462) for more details on creating a Custom Memory Part.

Revision History:

06/13/2016 - Initial Release



Answer Number 问答标题 问题版本 已解决问题的版本
69037 UltraScale/UltraScale+ RLDRAM3 - Release Notes and Known Issues N/A N/A
AR# 67367
日期 12/19/2017
状态 Active
Type 已知问题