We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 68131

2016.1 IBERT GTH - Unable to set PORT.GTTXRESET = 1


After I program an IBERT GTH bitfile on a KCU105 board, and create the link with Near end PMA Loopback and set "LOGIC.RESETFSM_OVERRIDE= 1" and "PORT.GTTXRESET = 1", I see that "PORT.GTTXRESET" and "LOGIC.RESETFSM_OVERRIDE" values are toggling between 0 and 1 in the dashboard.

Because of this issue, Vivado hangs while trying to change the reset, or any other properties in the GUI.


To work around this issue, set GTTXRESET and RESETFSM_OVERRIDE back to 0.

As soon as both of the signals are set back to zero, the link status signal is set back to High.

Click on the TXRESET & RXRESET buttons in the SIO GUI to get clean data.

If the user is setting GTTXRESET and RESETFSM_OVERRIDE to 1, it is expected that after some time user will set back these signals to 0 to get the link back.

AR# 68131
日期 09/12/2017
状态 Active
Type 综合文章
  • FPGA Device Families