AR# 68211

Zynq UltraScale+ MPSoC - FSBL does not initialize above first 2GB of PS DDR when using ECC, causing program exceptions

描述

The FSBL does not initialize above the first 2GB of PS DDR when using ECC, which causes program exceptions.

How do I resolve this issue?

解决方案

This issue is planned to be fixed in the FSBL starting in Vivado 2016.4.

AR# 68211
日期 12/12/2016
状态 Active
Type 综合文章
器件
Tools
IP