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AR# 68801

HDMI Transmitter (TX) Subsystem v2.0 - SW Driver 3.0 - Is there a way to force the downstream HDMI Sink to reset and re-establish a link similar to how the HDP can force the HDMI Source to retrain?

描述

Is there a way to force the downstream HDMI Sink to reset and re-establish a link similar to how the HDP can force the HDMI Source to retrain?

解决方案

There is nothing in the specification that directly addresses this issue, however if you disable the TMDS clock that should have the same effect.

The sink will stop if there is no clock being forwarded. Also, for the RX side to force a retrain, the HDP toggle is 100ms. By using these together you can force the HDMI Sink to retrain.

There is a function in the Video PHY Controller software driver that allows the user to disable the TMDS clock by disabling the OBUF.

You can then add a delay for 100ms, and then re-enable the TMDS clock.


Example:

This was tested with a KC705 board and the inrevium HDMI2.0 FMC Card (TB-FMCH-HDMI4K) running the HDMI TX Subsystem, and using the QD 780D as the HDMI Sink. 

The below steps are sufficient to cause the sink (QD 780D) to retrain to the incoming video. 

A reset of the HDMI TX or VPHY are not required as it will stop the clock and then restart it.

// Disable TX TDMS clock
XVphy_Clkout1OBufTdsEnable(&Vphy, XVPHY_DIR_TX, (FALSE));
usleep(100000);
XVphy_Clkout1OBufTdsEnable(&Vphy, XVPHY_DIR_TX, (TRUE));


Note: Another solution would be to completely reset the HDMI TX.

This could be done by simply reprogramming the reference clock which will trigger the Video PHY and the HDMI TX Subsystem to completely reset, which will also reset the link.

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
65911 HDMI 1.4/2.0 发送器 (TX) 子系统 — Vivado 2015.4 工具及更新版本的版本说明和已知问题 N/A N/A
AR# 68801
日期 08/23/2017
状态 Active
Type 综合文章
IP
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