When I include the In-System IBERT core to transceiver wizard IP in a design, the RXOUTCLK frequency gets doubled.
This behavior causes pulse width violations during implementation of the example design.
To work around this issue, use the 'set_case_analysis' XDC constraints with the value set to 0 on the 'rxrate_o' output port of In-System IBERT in the design top or targeted constraints file.
set_case_analysis 0 [get_pins gtwizard_ultrascale_0_in_system_ibert_0_inst/rxrate_o*].
This issue has been fixed in the 2017.4 release and later versions.