When choosing a PHY device to be interfaced with Zynq UltraScale+ MPSoC devices, it is important to consider the following criteria:
Xilinx can only provide assistance for the devices listed as 'Xilinx Tested and Supported'.
The following PHY devices have been tested and validated using Xilinx PS CAN IP:
In baremetal testing, connect two separate Zynq MPSoC boards and have the CAN nodes on different boards communicate with each other.
This test cases include:
|External CAN PHY||Xilinx IP||Baremetal Test Status|
Note: All tests are carried out on Vivado 2016.4.