AR# 69449


Virtex UltraScale+ FPGA VCU118 Evaluation Kit - U41 is connected to VCC1V2


VCU118 Rev 1.0 , Rev 1.1 and Rev 2.0 show U41 NVT2008PW, a bi-directional voltage-level translator VREFA powered by VCC1V2 FPGA, a 1.2V voltage.

U41 PMOD pins are connected to Bank 67, an FMC bank with VADJ = 1.8V.

Should this VREFA be connected to 1.8V?


Ideally U41 VREFA should be connected to 1.8V voltage, but no fallout has been seen in the testing of VCU118 boards.

FPGA VCCO on Bank 67 is VADJ and the level shifter, U41 (NVT2008) VREFA pin is tied to 1.2V.  

While not optimal, the user can set VADJ to 1.2V to match U41 VREFA to work around this.

The VCU118 PMOD0 interface can be reliably used when VADJ is set to 1.2V via the System Controller.

This is a limitation in the use case of the PMOD0 and FMC interfaces.



Answer Number 问答标题 问题版本 已解决问题的版本
68268 Virtex UltraScale+ FPGA VCU118 开发套件 — 已知问题及版本说明主要答复记录 N/A N/A
AR# 69449
日期 02/22/2019
状态 Active
Type 综合文章
Boards & Kits
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