AR# 69676

DMA Subsystem for PCI Express (Vivado 2017.2) - MSI-X Interrupt can hang in a specific scenario

描述

Version Found: v3.1 (Rev1)

Version Resolved and other Known Issues: (Xilinx Answer 65751)

MSI-X Interrupt can hang in the following scenario:

  • MSI-X is Disabled in the MSI-X Capability register (PCI Configuration Space 0x60 Bit 31 = 0)
  • Legacy interrupt is disabled in the Command Register (PCI Configuration Space 0x4 Bit 10 = 0)
  • Any interrupt issued at this point will set the PCI Configuration Space Status Register Bit 3 (indicates Interrupt pending)

If MSIX Interrupt is then enabled in the MSIX Capability Register (PCI Configuration Space 0x60 Bit 31 = 1), no interrupt will be issued.


This article is part of the PCI Express Solution Centre

(Xilinx Answer 34536) Xilinx Solution Center for PCI Express

解决方案

To work around the issue, the driver should make sure that legacy Interrupts are enabled before any transactions are issued by setting the PCI Configuration Space Offset 0x4 Bit 10 = 1.

Note: The "Version Found" column lists the version the problem was first discovered.

The problem also exists in earlier versions, but no specific testing has been performed to verify earlier versions.

Revision History:

08/28/2017 - Initial Release

AR# 69676
日期 09/07/2017
状态 Active
Type 已知问题
IP