AR# 69816


XPE - Zynq UltraScale Plus - What is the power consumption of the Processor Subsystem (PS) when the part is powered and unconfigured


When estimating the static only power for a ZUP device how should the PS tab be setup?

Note: the solution below is an approximation, if more details are required please open a support service request.


The static or powered and un-configured mode of the Processor Subsystem (PS) is quite different when compared to the Programmable Logic (PL). 

The PS power will be determined by what rails are powered.

For the PL, VCCINT, VCCAUX, VCCINT_IO, and VCCBRAM are all required voltages and so the static power is displayed for these rails.

For the PS, only PSINTLP is required. As a result, only this rail is reported in XPE and the PS is put into "Deep Sleep" mode.   

If a users system will have all of the PS rails powered when the part is un-configured, then these sections need to be enabled in XPE to get their static power. 

For example if the LP & FP domains are powered then the following setup would be needed in the PS tab.

You can see everything is powered on as all the rails are active:


The R5's and A53's should also be enabled with the applicable clock rate a 0% load:

AR# 69816
日期 10/06/2017
状态 Active
Type 综合文章
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