AR# 69845

Vivado IP Integrator - CRITICAL WARNING: [BD 41-1756] The number of cascaded segments <##>. accessed through interconnect interface exceeds the limit of 16.

描述

When validating my block design (BD) I get the following critical warning:

CRITICAL WARNING: [BD 41-1756] The number of cascaded segments <##>, accessed through interconnect interface </microblaze_0_axi_periph/M01_AXI> exceeds the limit of 16. The addressing algorithm attempts to combine contiguous segments as shown below but only succeeded in reducing the number to <##>. Rearrange the cascaded interconnect topology to add another stage that splits the segment load across master interfaces.
Segments:
01 0x20000000 [ 256M ]
   0x20000000 [ 256M ]    /microblaze_0/Data [ /zynq_ultra_ps_e_0/DDR_LOW ]
02 0xFD800000 [ 4M ]
.
.
.

Why do I get the critical warning?

Is there anything I can do about it?

解决方案

There are 16 address ranges available to be used with and AXI interconnect. 

If the address mapping algorithm finds too many segments being funneled through a single MXX_AXI on a interconnect, it collapses even disjoint segments into each other where possible.
However, there is a rule that there cannot be another segment on a different MYY_AXI of the same interconnect between the two segments being combined.  If the algorithm fails to condense the number of contiguous segment to 16 or less that the above Critical Warning is issued.

What the algorithm does is combine all segments together into a single list, with the collapsing segments marked as "SOFT" and segments from other branches marked as "HARD" and then tries to combine the SOFT segments into each other.
If the HARD and SOFT segments are interleaved, having the hard segments between the soft segments prevents collapsing them the soft segments into each other.  The segments in the design are not collapsible.

To fix this place the access to each S_AXI interface through a separate interconnect.

AR# 69845
日期 09/25/2017
状态 Active
Type 综合文章
Tools