AR# 69880

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JESD204 Solution Center - Design Assistant - PHY settings

描述

This Answer Record forms part of the JESD204 Solution Center, and covers JESD204 PHY settings and information.

解决方案

(Xilinx Answer 63634)JESD204 PHY v1.0 - TX_RESET_GT and RX_RESET_GT affect both TX and RX SERDES for 7 Series FPGA
(Xilinx Answer 66575)JESD204 and JESD204 PHY - JESD interfaces and the rxencommaalign signal
(Xilinx Answer 66923)JESD204 - What is the purpose of the rxencommaalign signal?

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
67695 JESD204 - Design Assistant N/A N/A

子答复记录

AR# 69880
日期 10/25/2017
状态 Active
Type 解决方案中心
IP
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