AR# 70228

Zynq UltraScale+ MPSoC, Vivado 2017.3 - PS DDR Does not work correctly in hardware, but did work in Vivado 2017.2 and earlier


In Vivado 2017.3, My PS DDR does not work correctly in hardware.

However, it did work in Vivado 2017.2 and earlier.


This can occur because the PS DDR component data width parameter of the Processing System IP GUI is not correctly updated.

This leads to incorrect settings in the PS DDR initialization script, potentially leading to hardware failures.

A patch is attached below to correct the issue in Vivado 2017.3 and 2017.3.1.

This issue will be fixed starting with Vivado 2017.4.


文件名 文件大小 File Type 3 MB ZIP
AR# 70228
日期 12/12/2017
状态 Active
Type 综合文章