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  3. AR# 71653: PetaLinux 2018.3 - Product Update Release Notes and Known Issues

AR# 71653

PetaLinux 2018.3 - Product Update Release Notes and Known Issues

描述

This Answer Record acts as the release notes for PetaLinux 2018.3 and contains links to information about resolved issues and updated collateral contained in this release.

解决方案


BSPs supported for the 2018.3 PetaLinux Release

This table contains supported BSPs for Zynq-7000, MicroBlaze, and Zynq UltraScale+ MPSoC available on the Embedded Development download page.

Note: XY - Represents release year, Y - Represents release version.

PlatformVariantBSP NameBSP Description
MicroBlazeAC701xilinx-ac701-v20XY.Z-final.bspThis BSP contains two BSPs [AC701 lite, AC701 full]
  • Hardware (AC701 lite): Design contains MicroBlaze Processor, core peripherals UART_lite, Ethernet Lite, AXI I2C, AXI GPIO, AXI DDR controller, SPI flash, led_4bits.
    AC701 lite contains the AXI Lite IPs UART_lite, Ethernet Lite etc. in contrast to AC701 Full
  • Hardware (AC701 full): Design contains MicroBlaze Processor, core peripherals AXI UART16550, AXI 1G/2.5G Ethernet, AXI I2C, AXI GPIO, AXI DDR controller, SPI flash, led_4bits.
  • Software: fs-boot, u-boot, Linux, device-tree, rootfs (minimal packages).
  • Pre-built Images: Ready to test images bitstream, fs-boot, u-boot, Linux and rootfs for booting u-boot and Linux.
MicroBlazeKC705xilinx-kc705-v20XY.Z-final.bspThis BSP contains two BSPs [KC705 lite, KC705 full]
  • Hardware (KC705 lite): Design contains MicroBlaze Processor, core peripherals UART_lite, Ethernet Lite, AXI I2C, AXI GPIO, AXI DDR controller, Linear flash,led_8bits.
  • Hardware (KC705 full): Design contains MicroBlaze Processor, core peripherals AXI UART16550, AXI 1G/2.5G Ethernet, AXI I2C, AXI GPIO, AXI DDR controller, Linear flash,led_8bits.
  • Software: fs-boot, u-boot, Linux, device-tree, rootfs (minimal packages).
  • Pre-built Images: Ready to test images bitstream, fs-boot, u-boot, Linux and rootfs for booting u-boot and Linux.
MicroBlazeKCU105xilinx-kcu105-v20XY.Z-final.bspThis BSP contains:
  • Hardware: Design contains MicroBlaze Processor, core peripherals AXI I2C, AXI GPIO, AXI DDR controller, AXI QSPI, led_8bits, and AXI Ethernet IP.
  • Software: fs-boot, U-boot, Linux, device-tree, rootfs (minimal packages).
  • Pre-built Images: Ready to test images bitstream, fs-boot, u-boot, Linux and rootfs for booting u-boot and Linux.
Zynq-7000ZC702xilinx-zc702-v20XY.Z-final.bspThis BSP contains:
  • Hardware: Design contains Zynq-7000 PS block (DDR, UART, SD, QSPI, Ethernet etc.) and AXI GPIO connected with led_4bits.
  • Software: FSBL, U-boot, Linux, device-tree (includes open-amp), rootfs (minimal packages).
  • Pre-built Images: Ready to test images bitstream, FSBL, u-boot, Linux and rootfs for booting u-boot and Linux.
Zynq-7000ZC706xilinx-zc706-v20XY.Z-final.bspThis BSP contains:
  • Hardware: Design contains Zynq-7000 PS block (DDR, UART, SD, QSPI, Ethernet etc.) and AXI GPIO connected with led_4bits, dip_switches_4bits, gpio_sws_3bits.
  • Software: FSBL, U-boot, Linux, device-tree (includes open-amp), rootfs (minimal packages).
  • Pre-built Images: Ready to test images bitstream, FSBL, u-boot, Linux and rootfs for booting u-boot and Linux.
Zynq-7000Avnet Digilent Zedboardavnet-digilent-zedboard-v20XY.Z-final.bspThis BSP contains:
  • Hardware: Design contains Zynq-7000 PS block (DDR, UART, SD, QSPI, Ethernet etc.) and AXI GPIO connected with led_8bits, btns_5bits, sws_8bits.
  • Software: FSBL, U-boot, Linux, device-tree (includes open-amp), rootfs (minimal packages).
  • Pre-built Images: Ready to test images bitstream, FSBL, u-boot, Linux and rootfs for booting u-boot and Linux.
Zynq UltraScale+ MPSoCZCU102 production siliconxilinx-zcu102-v20XY.Z-final.bspThis BSP contains:
  • Hardware: Design contains Zynq UltraScale+ MPSoC PS block (DDR, UART, SD, QSPI, Ethernet, PCIe, DP, USB, SATA etc.)
  • Software: FSBL, PMUFW, ATF, U-boot, Linux, device-tree (includes open-amp, Xen), rootfs (minimal packages).
  • Pre-built Images: Ready to test images bitstream, FSBL, PMUFW, atf, u-boot, Linux and rootfs for booting u-boot and Linux.
Zynq UltraScale+ MPSoCZCU102 ZU9 ES2 Rev 1.0xilinx-zcu102-zu9-es2-rev1.0-v20XY.Z-final.bspThis BSP contains:
  • Hardware: Design contains Zynq UltraScale+ MPSoC PS block (DDR, UART, SD, QSPI, Ethernet, PCIe, DP, USB, SATA etc.)
  • Software: FSBL, PMUFW, ATF, U-boot, Linux, device-tree (includes open-amp, xen), rootfs (minimal packages).
  • Pre-built Images: Ready to test images bitstream, FSBL, PMUFW, atf, u-boot, Linux and rootfs for booting u-boot and Linux.
Zynq UltraScale+ MPSoCZCU104 V2 production siliconxilinx-zcu104-v20XY.Z-final-v2.bspThis BSP contains:
  • Hardware: Design contains Zynq UltraScale+ MPSoC PS block (DDR, UART, SD, QSPI, Ethernet, DP, USB, SATA etc.), VCU DDR4 Controller (PL DDR) and VCU IP.
  • Software: FSBL, PMUFW, ATF, U-boot, Linux, device-tree (includes open-amp, xen), vcu-control software, rootfs (minimal packages which includes additional SW packages like GStreamer, OpenMAX, V4L2, libdrm and vcu-examples).
  • Pre-built Images: Ready to test images bitstream, FSBL, PMUFW, atf, u-boot, Linux and rootfs for booting u-boot and Linux.
Zynq UltraScale+ MPSoCZCU106 V2 production siliconxilinx-zcu106-v20XY.Z-final-v2.bspThis BSP contains:
  • Hardware: Design contains Zynq UltraScale+ MPSoC PS block (DDR, UART, SD, QSPI, Ethernet, PCIe, DP, USB, SATA etc.), VCU DDR4 Controller (PL DDR) and VCU IP.
  • Software: FSBL, PMUFW, ATF, U-boot, Linux, device-tree (includes open-amp, xen), vcu-control software, rootfs (minimal packages which includes additional SW packages like GStreamer, OpenMAX, V4L2, libdrm and vcu-examples).
  • Pre-built Images: Ready to test images bitstream, FSBL, PMUFW, atf, u-boot, Linux and rootfs for booting u-boot and Linux.
Zynq UltraScale+ RFSoCZCU111 production siliconxilinx-zcu111-v20XY.Z-final.bspThis BSP contains:
  • Hardware: Design contains Zynq UltraScale+ RFSoC PS block (DDR, UART, SD, QSPI, Ethernet, DP, USB, SATA etc) and rf_data_converters, sd_fec_dec, adc_sink, dac_source, axi_gpio, axi_intc IP's.
  • Software: FSBL, PMUFW, ATF, U-boot, Linux, device-tree (includes open-amp,xen), rfdc-drivers, rootfs (minimal packages which includes RDFC example applications).
  • Pre-built Images: Ready to test images bitstream, FSBL, PMUFW, atf, u-boot, Linux and rootfs for booting u-boot and Linux.


Note: The "sstate cache file" (sstate-rel-v2018.3.tar.gz) can be found on the Xilinx download area along with an associated README (sstate_rel_2018.3_README) file that outlines the procedure to use "sstate cache".

Refer to the attached file "2018.3_PetaLinux_Packages_List" for software package versions tested on host machines, which is required for PetaLinux installation tools.

README for downloads area.


PetaLinux 2018.3 contains the following build collateral:

ComponentGit repoGit BranchesGit TagsCommit IDComments
FSBLgit://github.com/Xilinx/embeddedsw.gitrelease-2018.3xilinx-v2018.35b3764e8eb42e543f411f6ec3ed31c7112c6e178
FSBL for Zynq-7000 is at embeddedsw/lib/sw_apps/zynq_fsbl
FSBL for Zynq UltraScale+ is at embeddedsw/lib/sw_apps/zynqmp_fsbl
PMU Firmwaregit://github.com/Xilinx/embeddedsw.gitrelease-2018.3xilinx-v2018.35b3764e8eb42e543f411f6ec3ed31c7112c6e178
PMU for Zynq UltraScale+ Firmware is at embeddedsw/lib/sw-apps/zynqmp_pmufw
Device-treegit://github.com/Xilinx/device-tree-xlnx.gitmasterxilinx-v2018.3b7466bbeeede15ec72143e3c3466e067589821a1

Linuxgit://github.com/Xilinx/linux-xlnx.gitxlnx_rebase_v4.14xlnx_rebase_v4.14_2018.3eeab73d1207d6fc2082776c954eb19fd7290bfbe
Linux Kernel rebase version 4.14
U-Bootgit://github.com/Xilinx/u-boot-xlnx.gitmasterxilinx-v2018.3d8fc4b3b70bccf1577dab69f6ddfd4ada9a93bacU-boot Version v2018.01
QEMUgit://github.com/Xilinx/qemu.gitmasterxilinx-v2018.3f70bd86859c7a1a075ac864b4765168f821f1aae

Xengit://github.com/Xilinx/xen.gitxilinx/release-2018.3xilinx-v2018.3b2edf52680415daa9cb7db0d8999faca299cd13c
Xen Version 4.14
ARM-Trusted-Firmware (ATF)git://github.com/Xilinx/arm-trusted-firmware.gitmasterxilinx-v2018.308560c36ea5b6f48b962cb4bd9a79b35bb3d95ceATF is based on upstream version 1.5
Yoctogit://github.com/Xilinx/meta-xilinx.git
git://github.com/Xilinx/meta-xilinx-tools.git
git://github.com/Xilinx/meta-petalinux.git
rel-v2018.3No Tags7922f16dfa5308fb5419a80f513bb07c0384f95e
b286943d7d468e9ff10b9f9662767e8c71f104d1
254edec8368c3d30676135365734abe06e596881
Yocto 2.4.3 Rocko
qemu-devicetreesgit://github.com/Xilinx/qemu-devicetrees.gitbranch/xilinx-v2018.3xilinx-v2018.3e3e40b8829894a479c7d7380fc8137886645dda8

OpenAMPgit://github.com/Xilinx/open-amp.gitmasterxilinx-v2018.34dfe2ac14745e4a24d7319c634d5f9d2f3e328c6

libmetalgit://github.com/Xilinx/libmetal.gitmasterxilinx-v2018.382e26fb31b996011cd78c90689d1332e1f88fedf

VCU OpenMax ILgit://github.com/Xilinx/vcu-omx-il.gitmasterxilinx-v2018.3cf4b031ac88c7889e4f29ac7fc8ca7592bf12144

VCU Control Softwaregit://github.com/Xilinx/vcu-ctrl-sw.gitmasterxilinx-v2018.31cb5281d319ea4f3c0eb5514864c80d95e78fe6e

VCU Firmwaregit://github.com/Xilinx/vcu-firmware.gitmasterxilinx-v2018.3d01951905e1aedb179d838a6b86016f34e2f4966

VCU Modulesgit://github.com/Xilinx/vcu-modules.gitmasterxilinx-v2018.3f6a9093ec32ee97a2df065aee8b8e676c2024f01

GStreamer OpenMax ILgit://github.com/Xilinx/gst-omx.gitxilinx-masterxilinx-v2018.3b2dce0a04ea34b762149ffa5a0ea66abe00d7c88
GStreamer version 1.12.2
GStreamer Plugins-Basegit://github.com/Xilinx/gst-plugins-base.gitmaster-rel-1.12.2xilinx-v2018.371745a77db2c246aee48526c00813788f5efa710
GStreamer Plugins-Badgit://github.com/Xilinx/gst-plugins-bad.gitmaster-rel-1.12.2xilinx-v2018.39ad719a38c40403446b2ce2d3c1a4f35c5ab06b6
GStreamer Plugins-Goodgit://github.com/Xilinx/gst-plugins-good.gitmaster-rel-1.12.2xilinx-v2018.3d2c7cf8d752de84c30f9675572037e0250cd3c6d
GCC



MB compiler version 7.3
ARM 7.3

 

2018.3 Release Notes for Open Source components wiki page:

Covers details for below components changes (new features/fixes) in a particular release.


2018.3 New Features:

PetaLinux

  • Added support for using the trim version of XSCT tools to build components such as FSBL, PMUFW etc.,.
  • Added support for Programmable Logic (PL) device tree overlay.
  • Added support for FPGA Manager utilities.
  • PetaLinux now uses only versionless drivers from https://github.com/Xilinx/embeddedsw which means that <plnx-proj-root>/components/plnx_workspace will no longer have fsbl/pmu-firmware/fs-boot directories.
    For more details refer to (UG1144). It is now similar to other open source components like U-boot and Linux.
  • SDFEC Design Example is part of the ZCU111 PetaLinux BSP.
  • Added support for RHEL 7.5 and CentOS 7.5 build host.

GPU MALI-400

  • Added Wayland compositor and GBM buffer management support in MALI user space libraries for 32 and 64 bit mode.
  • Added support for Displayless EGL rendering for MALI binaries.

 

2018.3 Bug Fixes:

PetaLinux

  • Fixed RFDC build issues when using a custom ZCU111 HDF on top of xilinx-zcu111-v20XY.Z-final.bsp.
  • Linux reboot command does not work when TRACE port is present in the design.
  • Fixed do_populate_sysroot task for petalinux-user-image recipe.
  • PetaLinux installer fails to installs when /tmp directory has restricted access.
  • PetaLinux FIT image does not boot when image.ub size is larger on a ZC702 board.
  • Linux hangs when using lower 36-bit physical memory from petalinux-config option.
  • Fix for boot login console taking more than 8 minutes with 2018.2 based rootfs.

GPU MALI-400

  • Fixed YUV format issue where the TEX_WIDTH is being interpreted differently than expected.

    Known Issues for 2018.3:

    Linux/BaremetalComponentsDescriptionWork-aroundTo be fixed version
    LinuxYocto/PetaLinux2018.x Yocto/PetaLinux: Ubuntu 18.04.x LTS support (Xilinx Answer 71448)
    LinuxPetaLinuxZynq UltraScale+ MPSoC: How to enable UHS (SD 3.0) support for ZCU102 and ZCU106 evaluation board PetaLinux BSPs(Xilinx Answer 69978)
    LinuxXSDK2017.x-2018.x Zynq UltraScale+ MPSoC: Connecting XSDB to Linux CPU idle(Xilinx Answer 69143)
    LinuxYocto, PetaLinux2018.x Zynq UltraScale+ MPSoC: Yocto or PetaLinux throws warnings when the build do_rootfs task completes(Xilinx Answer 71110)
    LinuxDrivers2018.1-2018.3 Zynq UltraScale+ MPSoC: PetaLinux Warm-Restart BSP fails to wakeup Ethernet when FPD is off (Xilinx Answer 71028)
    LinuxFSBL2018.x Zynq UltraScale+ MPSoC: How to achieve SATA performance in Linux(Xilinx Answer 71584)
    LinuxFSBL2018.x Zynq UltraScale+ MPSoC: How to make SMMU work with SATA IP(Xilinx Answer 71790)
    LinuxPMUFW2018.2/3 Ultra96: PetaLinux BSP image does not shut down the board completely when using Matchbox desktop GUI power button or single press power button on board(Xilinx Answer 71722)
    LinuxPetaLinux2017.x-2018.3 Zynq-7000: Cannot boot Zynq-7000 PetaLinux images individually in legacy flow(Xilinx Answer 71231)2019.1
    LinuxPetaLinux2018.1-2018.3 Zynq UltraScale+ MPSoC: ARM Trusted Firmware hangs when UART0 is disabled in PetaLinux(Xilinx Answer 71743)2019.1
    LinuxDrivers2018.3 Zynq UltraScale+ MPSoC: Linux v4l2 mem2mem driver transcode fails when source buffer to mem2mem has different byte alignment restrictions(Xilinx Answer 71780)2019.1
    LinuxPetaLinux2018.3 Ultra96: PetaLinux FIT image(image.ub) fails to load at u-boot via USB boot mode(Xilinx Answer 71781)2019.1
    LinuxPMUFW2018.x Zynq UltraScale+ MPSoC: APU Only Restart fails after Power Off Suspend (POS)(Xilinx Answer 71766)2019.1
    LinuxDrivers2018.3 LogiCORE Video Mixer Linux Driver - Why do I see the Red and Blue colors swapped when setting the IP GUI configuration and the video format in the device tree for RGB and BGR? (Xilinx Answer 71802)2019.1
    LinuxVCU-GStreamer2018.3 Zynq UltraScale+ MPSoC VCU - Why does GStreamer crash when trying to decode some transport stream (TS) files?(Xilinx Answer 71809)2019.1
    LinuxVCU2018.3 Zynq UltraScale+ MPSoC VCU - Why does the display freeze after about 10 minutes of decoding and displaying some H.264 streams that are missing the start code in the first NAL unit?(Xilinx Answer 71810)2019.1
    LinuxVCU2018.3 Zynq UltraScale+ MPSoC VCU - Why does the VCU Decoder Control Software always output 10-bit data?(Xilinx Answer 71811)2019.1
    LinuxVCU2018.3 Zynq UltraScale+ MPSoC VCU - Why does the VCU Encoder take more time when using CONST_QP mode than it does in VBR mode?(Xilinx Answer 71812)2019.1
    LinuxVCU2018.3 Zynq UltraScale+ MPSoC VCU - Why does the VCU Control Software Decoder Example application hang while decoding streams which contain errors?(Xilinx Answer 71813)2019.1
    LinuxPetaLinux2018.3 PetaLinux: Menuconfig GUI does not come up when you run the petalinux-config -c kernel command multiple times on VM(Xilinx Answer 71814)2019.1
    LinuxDevice-tree2018.3 Zynq UltraScale+ MPSoC: DTG sub nodes for 10G/25G Ethernet Subsystem design with multicore does not work with same node label(Xilinx Answer 71817)2019.1
    LinuxGStreamer2018.x Zynq UltraScale+ MPSoC: Yocto or PetaLinux returns warnings when the build gstd do_configure task completes(Xilinx Answer 71830)2019.1
    LinuxVCU2018.3 Zynq UltraScale+ MPSoC VCU - Why does the VCU produce bad quality output when the LambdaCtrlMode = DYNAMIC_LDA or AUTO_LDA?(Xilinx Answer 71871)2019.1
    LinuxYocto, PetaLinux2018.3 Zynq UltraScale+ MPSoC/RFSoC: PetaLinux/Yocto fails to build FSBL component with fatal error: psu_init.h: No such file or directory(Xilinx Answer 71921)2019.1
    LinuxVCU2018.3 Zynq UltraScale+ MPSoC VCU - Why am I getting a "Channel creation failed" error when using the LOW_DELAY_P mode with HEVC mulit-stream encoding? (Xilinx Answer 71934)2019.1
    LinuxVCU2018.3 Zynq UltraScale+ MPSoC VCU - Why does the IDR not repeat when the IDR picture frequency is 1 and the GOP Length is 1? (Xilinx Answer 71987)2019.1
    LinuxVCU2018.3 Zynq UltraScale+ MPSoC VCU - Why do I see "blocky" results when decoding non-compliant stream where the max_dec_frame_buffering is larger than the MaxDpbSize? (Xilinx Answer 71991)2019.1
    LinuxVCU2018.3 Zynq UltraScale+ MPSoC VCU - Why do I see a bitrate of 1.55Mbps when using CBR Rate Control Mode with a Target Bit Rate of 1 Mbps and using a GOP Length of 12?(Xilinx Answer 71993)2019.1

    附件

    文件名 文件大小 File Type
    2018.3_PetaLinux_Package_List.xlsx 21 KB XLSX
    README_content_v2018.3.txt 1 KB TXT

    链接问答记录

    主要问答记录

    Answer Number 问答标题 问题版本 已解决问题的版本
    55776 PetaLinux 2013.04 及以后工具版本的版本说明与已知问题 N/A N/A

    子答复记录

    Answer Number 问答标题 问题版本 已解决问题的版本
    71802 2018.3 LogiCORE Video Mixer Linux Driver - Why do I see the Red and Blue colors swapped when setting the IP GUI configuration and the video format in the device tree for RGB and BGR? N/A N/A
    71809 2018.2/3 Zynq UltraScale+ MPSoC VCU - Why does GStreamer crash when trying to decode some Transport Stream (TS) files? N/A N/A
    71810 2018.2/3 Zynq UltraScale+ MPSoC VCU - Why does the display freeze after about 10 minutes of decoding and displaying some H.264 streams that are missing the start code in the first NAL unit? N/A N/A
    71811 2018.2/3 Zynq UltraScale+ MPSoC VCU - Why does the VCU Decoder Control Software always output 10-bit data? N/A N/A
    71812 2018.2/3 Zynq UltraScale+ MPSoC VCU - Why does the VCU Encoder take more time when using CONST_QP mode than it does in VBR mode? N/A N/A
    71813 2018.2/3 Zynq UltraScale+ MPSoC VCU - Why does the VCU Control Software Decoder Example application hang while decoding streams which contain errors? N/A N/A
    71798 2018.3 - Zynq UltraScale+ MPSoC VCU - Patches for 2018.3 LogiCORE H.264/H.265 Video Codec Unit (VCU) - Linux Kernel Module, VCU Control Software, GStreamer and OMX N/A N/A
    71871 2018.2/3 Zynq UltraScale+ MPSoC VCU - Why does the VCU produce bad quality output when the LambdaCtrlMode = DYNAMIC_LDA or AUTO_LDA? N/A N/A
    71934 2018.3 Zynq UltraScale+ MPSoC VCU - Why am I getting a "Channel creation failed" error when using the LOW_DELAY_P mode with HEVC multi-stream encoding? N/A N/A
    71987 2018.3 Zynq UltraScale+ MPSoC VCU - Why does the IDR not repeat when the IDR picture frequency is 1 and the GOP Length is 1? N/A N/A
    71991 2018.3 Zynq UltraScale+ MPSoC VCU - Why do I see "blocky" results when decoding non-compliant stream where the max_dec_frame_buffering is larger than the MaxDpbSize? N/A N/A
    71993 2018.3 Zynq UltraScale+ MPSoC VCU - Why do I see a bitrate of 1.55 Mbps when using CBR Rate Control Mode with a Target Bit Rate of 1 Mbps, and a GOP Length of 12? N/A N/A
    AR# 71653
    日期 02/11/2019
    状态 Active
    Type 版本说明
    器件
    Tools More Less
    Boards & Kits More Less