Version Found: RLDRAM3 v1.3
Version Resolved: See (Xilinx Answer 69037)
The purpose of this Answer Record is to highlight the possibility of negative interactions between the Soft Error Mitigation IP and RLDRAM3 cores.
If you are creating a new RLDRAM3 design and intend to use the SEM IP, please contact Xilinx Support.
Xilinx does not recommend using the SEM IP when RLDRAM3 cores are present in the design.
05/08/2019 - Initial Release