Why does the Zynq UltraScale+ MPSoC VCU Encoder HEVC EnableSkip setting cause encoding to stall after the 600th frame?
This is a known issue with the Zynq UltraScale+ MPSoC VCU - LogiCORE H.264/H.265 Video Codec Unit (VCU) that can occur when using the EnableSkip setting with HEVC encoding.
The issue occurs due to IDR pictures consuming higher bits, and being marked for skip.
As per the HEVC standard, DPB management is done before encoding the picture, and an IDR picture removes all previous references from the list.
If the current IDR is marked for skip due to low cpbsize / target bit rate, the encoder does not have any reference frame to encode the next P frame, leading to a deadlock.
The fixes below will cause the application to issue an exception and close instead of hanging.