What are the clock resource capabilities of the XPLA1 devices?
There are two sub families under XPLA1. Original (non-enhanced) and Enhanced Clock devices.
The original devices of the XPLA1 family had a limited amount of clocking resources. The 32 macrocell parts had two global clocks, and the 64 and 128 devices had 4 global clocks.
These global clocks are comprised of two types of clocks. CLK0 is a synchronous clock, which means that the clock network must be driven from an external source. CLK1, CLK2, and CLK3 are asynchronous clocks which means that they can be driven from an internal product term. If these internal product term clocks are used, this requires the use of a macrocell to construct these clocks, and the pin associated with the macrocell is driven by the output buffer.
The Enhanced Clock devices add two product term clocks to each logic block. These pt clocks are sum term or product term expressions only, and are local only to the logic block.