We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 7656

XPLA2 - How do I use the global clocks, global reset, and global tri-states in the XPLA2?


How do I use the XPLA2 global clocks, global reset, and global tri-state?


There are eight global clocks available. The fitter will place clock inputs on the global clock networks as needed, or the designer can assign an input clock to one of the global clock pins.

There is a global reset and a global tri-state available in this family of devices. The global reset is active low and resets ALL flip-flops in the device. The designer can assign this input signal to the global reset pin. The global reset signal is active Low, so the source file must describe the function of this input as an active-Low reset. If this signal is described otherwise, the fitter will issue an error that it could not make this assignment.

The global tri-state function is active High (i.e., all outputs are tri-stated when the signal is "1") and is utilized in the same manner as the global reset function.

Global tri-state is enabled in the control file. For schematic based designs, in the "Properties" window you can right-click on the Control file field and select a control file *.ctl. This is a text file that contains special information that you specify. This is discussed in the XPLA Professional User's manual and is also discussed in the Answers/Solutions database.

The GTS cannot be specified from the schematic. It is only implied since you cannot draw it in the schematic.

GTS is active low in XPLA1 devices and active high in XPLA2 devices.

AR# 7656
日期 12/15/2012
状态 Active
Type 综合文章