You are using a deprecated Browser. Internet Explorer is no longer supported by Xilinx.
CPLD XPLA2 - How many I/O pins are available per fast module?
Keywords: XPLA, CoolRunner, XPLA2, I/O, pins, fast, module
How many I/O pins are available in an XPLA2 fast module?
There are 32 I/O pins connected to each fast module, and they are organized
8 per logic block.