AR# 7833

Synplify - How do I infer SRL16 in Virtex/-E design?

描述

General Description:

How do I infer SRL16 in Virtex/-E designs?

解决方案

The latest version of Synplify infers SRL16 by default.

Refer to (Xilinx Answer 7822) for VHDL/Verilog code which results in SRL16 inference:

http://www.xilinx.com/techdocs/7822.htm.

AR# 7833
日期 12/15/2012
状态 Active
Type 综合文章