AR# 7867


2.1i COREGEN, BLOCK RAM: "Error:unable to open file for memory initialization: MIF file - binary error xx"


Keywords: coregen, RAM, mif, binary, virtex, rom, block, memory, init, single
port, dual port

Urgency: standard

General description:
When trying to generate a Single Port or Dual Port Virtex Block RAM memory core in
the 2.1i release, you may see the following error message if you direct the module to read in
a non-binary MIF initialization file:

"Error:unable to open file for memory initialization: MIF file - binary error xx
Error:An internal error has occured. Please call Xilinx support.
Error:Sim has a problem implementing the selected core. Implementation netlist will not be generated.
Error:SimGenerator: Failure of Sim to implement customization parameters core <core_name>"

One possible cause of this error may be that the values in the MIF file are specified in a format
other than binary format--i.e., in hexadecimal or decimal format. According to the block RAM datasheet,
MIF file data must be specified in binary format.


If you would like to specify the initialization values in HEX or decimal format,
you can do so by specifying the values in a .COE file in the
"MEMORY_INITIALIZATION_VECTOR" parameter field, rather
than in the MIF.

Otherwise, if you are using an MIF file, make sure the MIF file data is
specified in binary format. This should not be confused with the RADIX
option in the popup from the "Initial Contents" button, which gives you a choice
of Binary, Decimal, and Hexadecimal formats. The "RADIX" setting here
only applies to the "default value" for memory locations that are not otherwise
defined within the MIF file.

The preferred method for specifying initial values is through the COE file. In
a future release of the Block memory modules, initial values will only be
specifiable through a COE file.
AR# 7867
日期 08/01/2001
状态 Archive
Type 综合文章
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