General Description: When running m2.1i PAR, you may get following error message.
ERROR:Parsers:3 - Unable to parse "+" in line 4. ERROR:Par:51 - The .pcf file contains errors/warnings. PAR cannot proceed.
This error message is saying that it found an illegal character "+" in the .pcf file. This error may occur if you have used Synopsys FPGA Compiler to generate your netlist and if you have also used Floorplanner.
Synopsys FPGA Compiler may illegally write out .edif netlist with unusual net name such as:
The net name such as "%34%+%34%-return2956<2>" is illegal in EDIF. However, Xilinx implementation tools may not have a problem with it until PAR is run with these nets specified in the .pcf file.
解决方案
One workaound is to re-synthesize your design using a different Synopsys compiler such as FPGA Express or FPGA Compiler II, then re-implement the design.
However if you must use FPGA Compiler, then re-synthesize your code using following commands in your .synopsys_dc.setup file:
The above four lines should be added right after a line: "define_design_lib WORK -path ./WORK"
These can also be placed in your run script after the "compile" command has been run.
The newly created netlist should not contain any net names with unusual characters such as "%" or "+". Now, you should be able to implement your design without any problems.