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AR# 8035

EXEMPLAR: How to instantiate a pullup or pulldown in HDL code ? (VHDL/Verilog)

Description

Keywords: Exemplar, Leonardo, spectrum, pullup, pulldown

Urgency: Standard

How do I instantiate an internal pullup/pulldown resistor?

Note: Tested in 1999.1i

解决方案

1

VHDL examples:

1. Using component pullup

LIBRARY ieee;
USE ieee.std_logic_1164.all;

ENTITY test1 IS
PORT ( inbus_a, inbus_b, inbus_c : IN std_logic;
en_a, en_b, en_c : IN std_logic;
stopit : IN std_logic;
common : IN std_logic;
outbus : OUT std_logic );
END test1;

ARCHITECTURE exemplar OF test1 IS

-- Internal pullup
COMPONENT pullup
PORT ( o: OUT std_logic );
END COMPONENT;

SIGNAL int_bus : std_logic;

BEGIN

u0: pullup PORT MAP (int_bus);

-- RTL description
int_bus <= inbus_a AND stopit WHEN en_a = '1' ELSE 'Z';
int_bus <= inbus_b AND stopit WHEN en_b = '1' ELSE 'Z';
int_bus <= inbus_c AND stopit WHEN en_c = '1' ELSE 'Z';

outbus <= common XOR int_bus;

END exemplar;

2. Using Exemplar's pullup procedure (notice the use of exemplar
_1164 package):

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
LIBRARY exemplar;
USE exemplar.exemplar_1164.ALL;

ENTITY test2 IS
PORT ( inbus_a, inbus_b, inbus_c : IN std_logic;
en_a, en_b, en_c : IN std_logic;
stopit : IN std_logic;
common : IN std_logic;
outbus : OUT std_logic );
END test2;

ARCHITECTURE exemplar OF test2 IS

SIGNAL int_bus : std_logic;

BEGIN

pullup(int_bus);

-- RTL description
int_bus <= inbus_a AND stopit WHEN en_a = '1' ELSE 'Z';
int_bus <= inbus_b AND stopit WHEN en_b = '1' ELSE 'Z';
int_bus <= inbus_c AND stopit WHEN en_c = '1' ELSE 'Z';

outbus <= common XOR int_bus;

END exemplar;

2

//Verilog example

module test1 (inbus_a, inbus_b, inbus_c, en_a, en_b, en_c, stopit, common, outbus);
input inbus_a, inbus_b, inbus_c;
input en_a, en_b, en_c;
input stopit;
input common;
output outbus;


wire int_bus;


PULLUP U0 (int_bus);

// RTL description
assign int_bus = en_a? inbus_a && stopit : 1'bz;
assign int_bus = en_b? inbus_b && stopit : 1'bz;
assign int_bus = en_c? inbus_c && stopit : 1'bz;

assign outbus = common ^ int_bus;

endmodule
AR# 8035
创建日期 08/31/2007
Last Updated 04/24/2007
状态 Archive
Type 综合文章