We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 8153

2.1i COREGEN, C_IP3: Synchronous INIT control does not work when "Restrict Count" option is selected for Virtex Binary Counter


Keywords: virtex, coregen, counter, restrict, count

Urgency: hot

General Description:
There is a bug in the Virtex Binary Counter in which the logic associated with SINIT
(Synchronous Initialize) is not generated when you generate the counter with a "Count To" value specified.
(Before you can specify the "Count To" value, you must first activate the "Restrict Count"
option in the Binary Counter GUI.)

As a result of this bug, the Counter does not get initialized with the user-specified initial value
when SINIT is asserted. The bug is actually in the implementation netlist, so the symptoms
can be observed during both post-NGDBUILD and timing simulation.


As a workaround, regenerate the core with a LOAD input and use it to load the desired
initial value from the L input instead.
AR# 8153
日期 08/01/2001
状态 Archive
Type 综合文章