How do I configure the JTAG pins as an I/O in the CoolRunner XPLA3 devices?
To use the JTAG pins as an I/O on the CoolRunner XPLA3 devices, you must first pin assign the I/O to the desired JTAG pin location. Afterwards, you need to instruct the CPLD tools that they will be used as dual function pins. This is done by DESELECTING the Reserve ISP Pins option. This option is available only if you have the Property Display Level to Advanced.
Once this is completed, your design can be implemented and the desired signal will be mapped to the proper JTAG pins.
For the XPLA Professional Software Versions
To use TDO as an output on the CoolRunner devices, assign the desired signal to the pin number where TDO is located as follows:
1. In the XPLA Pro GUI, click Properties -> Show. Make sure that "Reserve ISP pins" is unchecked.
2. Click "Save As Default", and then click "Hide".
Once this is done, you can re-fit your design, and the desired signal will be mapped to the TDO pin.
NOTE: If the "Reserve ISP pins" option is left checked, the tool produces an error message in the ".LOG" file:
"FATAL ERROR 3229: Invalid pin specification or attribute for pin <TDO pin number>"
The signal locked to the TDO pin is routed to a different pin, and the JEDEC file is still created.