We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 8473

FPGA Editor 2.1i - DRC does not detect possible errors in a hard macro design


Keywords: FPGA, Editor, hard, macro, DRC

Urgency: Standard

General Description:
When I run DRC on a hard macro design, only the typical warning values are displayed. When I save the design as "File" - > "Save As..." and select a different name, unknown errors occur without any explanation.


This issue is scheduled to be fixed in the next major software release.

Please see (Xilinx Answer 8216) for more information.
AR# 8473
日期 07/09/2001
状态 Archive
Type 综合文章