AR# 8483


Virtex - VHDL code for SelectLink application


Keywords: Virtex, SelectLink, Select, Link, VHDL, Verilog

Urgency: Standard

General Description:
A Verilog code for SelectLink applications for Virtex devices is available at:

(Currently, Xilinx does not plan to add a VHDL code generator.)



Most synthesis/simulation tools can translate both Verilog and VHDL.
A workaround is to instantiate the generated Verilog macro in your VHDL design.


If your synthesis/simulation tool can't translate VHDL and Verilog you have to
translate the Verilog code into VHDL.
AR# 8483
日期 04/25/2006
状态 Archive
Type 综合文章
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