General Description From Xilinx Design Manager or Foundation Project Manager, when you open Implementation Options -> Configuration Option ->Configuration Tab, TDI and TDO of the JTAG pin setting may have both "float" and "pullup" selected as default option. (Technically, it should be one or the other.) Selecting one of them may not be able to let you de-select the other one. Furthermore, there may not be anything selected for TDO.
This is a problem with GUI setting; the switches for TDI and TDO seems to be crossed. If you select "pull up" for TDO will let you de-select "float" for TDI and vice versa.
Regardless of the GUI problem, Xilinx Design Manager and Foundation Project Manager will use following conditions if default setting has not been changed by user: TCK = pull up TDI = pull up TDO = Float TMS = Pullup
To confirm what is actually being used by Bitgen program or Configuration Step, check Bitgen.ut file generated after Configure step of the Flow Engine. Bitgen.ut file should be created in the project directory under appropriate version and revision directory.
If options specified in Bitgen.ut file is not what you have intended to use, then manually modify the appropriate Bitgen.ut file and re-run bitgen or the Configuration step of the FlowEngine.
To re-run Configuration Step with from Design Manager/Flow Engine: 1) Manually modify Bitgen.ut file in your appropriate version/revision directory. 2) Open Design Manager/Flow Engine with your working version/revision selected. 3) Click on "Step Back" button once, so Configure step is cleared. 4) Click on "Run" button to re-run the Configure step.
To re-run Bitgen from the command line: 1) Manually modify Bitgen.ut file in your appropriate version/revision directory. 2) Run Bitgen from the command prompt with -f option: bitgen -f bitgen.ut If you need to see other bitgen options, type: bitgen -f virtex
This GUI problem is fixed in 3.1i release of Xilinx Software.