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AR# 9216

COREGEN, C_IP5 - Internal error: "FATAL: Sim SCALING_ACCUM: equateNets failed " when generating Virtex DA FIR Filter with 2-bit coefficients

Description

Keywords: distributed arithmetic, DA, virtex, FIR, scaling_accum, C_IP4, C_IP5

The following errors may be seen when trying to generate v1.0.x and v2.0
of the Virtex Distributed Arithmetic FIR Filter with 2-bit coefficients:

ERROR: An internal error has occurred. Please call Xilinx support.
ERROR: An internal error has occurred. Please call Xilinx support.
ERROR: Sim has a problem implementing the selected core. Implementation
netlist will not be generated.
ERROR: SimGenerator: Failure of Sim to implement customization parameters core
<core_name>
WARNING: Core <core_name> did not generate product ImpNetlist.
WARNING: Warnings and/or errors encountered while generating ><core_name>
(Distributed_Arithmetic_FIR_Filter 2.0) All output products requested
may not have been generated.

If the CORE Generator application is restarted in command line mode
with the -d debug option ("coregen -d"), the following additional messages appear:

Debug: >> loaded IP class com.xilinx.ip.baseblox_v1_0.C_GATE_BUS_V1_0
Debug: >> loaded IP class com.xilinx.ip.da_fir_v2_0.C_SEQ_ADD_SUB_V2_0
Debug: >> loaded IP class com.xilinx.ip.baseblox_v1_0.C_DIST_MEM_V1_0
Debug: >> loaded IP class com.xilinx.ip.baseblox_v1_0.C_SCALED_ADDSUB_V1_0
Debug: >> loaded IP class com.xilinx.ip.baseblox_v1_0.C_DIST_MEM_GUI_V1_0
Debug: >> loaded IP class com.xilinx.ip.baseblox_v1_0.C_ACCUM_V1_0_GUI
FATAL: Sim SCALING_ACCUM: equateNets failed for net2=Q_NET index=10 width=10.
ERROR: An internal error has occurred. Please call Xilinx support.
FATAL: ERROR: Caught general Throw during netlist generation
ERROR: An internal error has occurred. Please call Xilinx support.
java.lang.RuntimeException
at com.xilinx.sim.base.Sim.equateNets(Sim.java:654)
at com.xilinx.ip.baseblox_v1_0.C_ACCUM_V1_0.buildVirtexAccum(C_ACCUM_V1_0.java:1182)

解决方案

The problem is caused by certain combinations of parameters, (it has been
observed when the coefficient bit widths are 2 bits wide) and is due to a bug in the
optimization of the accumulator subblock that is used in the core..

The workaround is to deselect the Optimize Coefficients option before trying to
generate the Filter. The side effect of deselecting this option is higher
CLB utilization.
AR# 9216
创建日期 08/21/2007
Last Updated 04/01/2009
状态 Archive
Type 综合文章