AR# 9371

CPLD XC9500 Family - Suggestions for lowering power consumption

描述

General Description:

What design techniques can I use to lower power for my XC9500 design?

解决方案

1. Set the device to Low Power mode. This is done by setting the macrocell power setting to "Low" in the implementation options.

2. Use global resources instead of product terms whenever possible

3. Set the unused I/O to ground. You can accomplish this by setting "Create Programmable Ground Pins on Unused I/O" in the implementation options.

4. For XC9500 5-volt devices, ensure that you have pin and local feedback enabled in the implementation options.

For more information, please see the application note "Understanding XC9500XL CPLD Power" (Xilinx XAPP114).

AR# 9371
日期 12/15/2012
状态 Active
Type 综合文章