You are using a deprecated Browser. Internet Explorer is no longer supported by Xilinx.
ISE MAP - "Error: MapLib:30 - Bad format for LOC constraint..."
If a pin is assigned to an invalid device location or is incorrectly specified, MAP reports the following error:
ERROR:MapLib:30 - Bad format for LOC constraint xxx on yyy.
This error usually occurs when an invalid site name is specified for a LOC constraint in your design.
This occurs because the site specified does not exist in the device/package combination that was chosen.
Valid site names can be verified by opening the FPGA Editor on a "new" design and specifying the device and package targeted by MAP.
Use the "Find" function to search for the site name in question (please note that site names are case-sensitive).
Note: Keep in mind that there is a difference between pins that can be used in this context as part of a design and device pins that are used for configuration and power connection.
Not all device pins will be recognized as existing for design purposes.
In cases where the failed LOC constraints are not critical, it is possible to bypass this error by setting the environment variable listed below (the LOC constraints involved are then ignored).
setenv XIL_MAP_LOCWARN 1
For general information about setting ISE environment variables, see (Xilinx Answer 11630).