AR# 9454: 6.1i XST - How do I perform post-synthesis simulation for XST?
AR# 9454
6.1i XST - How do I perform post-synthesis simulation for XST?
描述
General Description:
How do I perform post-synthesis simulation for XST?
解决方案
XST generates two types of files:
- NGDBuild format (".ngc")
- LOG file
Any constraint that XST writes will be contained in the .ngc file.
XST does not generate VHDL/Verilog netlists for post-synthesis simulation. You must run the ".ngc" file via NGDBuild, and then use "NGD2VHDL" and "NGD2VER" to generate simulation netlists.