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AR# 9454

6.1i XST - How do I perform post-synthesis simulation for XST?

Description


General Description:

How do I perform post-synthesis simulation for XST?

解决方案


XST generates two types of files:



- NGDBuild format (".ngc")

- LOG file



Any constraint that XST writes will be contained in the .ngc file.



XST does not generate VHDL/Verilog netlists for post-synthesis simulation. You must run the ".ngc" file via NGDBuild, and then use "NGD2VHDL" and "NGD2VER" to generate simulation netlists.
AR# 9454
创建日期 09/01/2007
Last Updated 10/28/2011
状态 Archive
Type 综合文章