Description: When running the placer from within FPGA_EDITOR (Tools-->Place-->Auto Place All-->Coarse Placement) the placer is not correctly invoked and no action occurs. If the user tries to continue to the routing phase, the following error will be encountered:
#ERROR:Route:10 - There are no connections to route. If this is incorrect, please check the mapper report file (.mrp) to verify why any specific net or component may have been trimmed out of the design. Halted route status: 43 of 109 nets are fully routed.
The work around is to use the "Specify Level" option rather than Coarse Placement.
This problem is scheduled to be fixed in the first major release following version 3.1i.