AR# 994: Foundation: Improper Netlist error while loading functional simulation
AR# 994
Foundation: Improper Netlist error while loading functional simulation
Description
This problem mainly occurs with Foundation 6.0.0, but may also occur with 6.0.1.
While executing a functional simulation on a schematic design, the tools report that you have an improper netlist for gate array.
This error may be issued because the XNF file(s) generated by XABEL and/or XVHDL have EQN symbols in them. These EQN symbols are not simulatable and the tools issue the netlist error.
Another cause of the error is using the "FPGA symbol" option when creating macro symbols. This option should only be used for board-level simulation.
解决方案
1
During XABEL and VHDL synthesis, the IMPROVEX program creates files named <module_name>.XNF and <module_name>.XAS. The XAS file is functionally equivalent to the XNF file, but does not contain EQN symbols.
Before performing functional simulation, make a backup copy of the XNF file, renaming it to <module_name>.XN2. Then rename the XAS file to XNF and then run functional simulation.
After functional simulation, rename the XN2 file back to XNF for the implementation and timing simulation steps.
2
One other cause of this problem can be if a symbol on the schematic is set to type "FPGA Symbol". To check this, select the symbol in the schematic editor and type Ctrl-E. This will bring up the Symbol Editor. In the upper right hand corner is a checkbox labeled "FPGA symbol". Uncheck this box and try the simulation again.
3
For VHDL modules you can choose not to run IMPROVEX (uncheck the IMPROVEX box in Synthesis->Options). This will produce an XNF file without EQN symbols. If you do not run IMPROVEX before functional simulation, before the translation step it is strongly recommended that you recompile the VHDL module(s) and run IMPROVEX.