Performance and Resource Utilization for PR Bitstream Monitor v1.0

Vivado Design Suite Release 2018.1

Interpreting the results

This page contains maximum frequency and resource utilization data for several configurations of this IP core. The data is separated into a table per device family. In each table, each row describes a test case. The columns are divided into test parameters and results. The test parameters include the part information and the core-specific configuration parameters. Any configuration parameters that are not listed have their default values; any parameters with a blank value are disabled or set automatically by the IP core. Consult the product guide for this IP core for a list of GUI parameter and user parameter mappings.

Data is provided for the following device families:

Kintex-7

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
RESET_ACTIVE_LEVEL
CTRL_INTERFACE_TYPE
CTRL_ADDR_WIDTH
STS_HIST_BUFFER_WHEN_FULL
DP_PROTOCOL
PROTOCOL_RESET_ACTIVE_LEVEL
DP_AXI_ID_WIDTH
DP_AXI_AWUSER_WIDTH
DP_AXI_WUSER_WIDTH
DP_AXI_BUSER_WIDTH
DP_AXI_ARUSER_WIDTH
DP_AXI_RUSER_WIDTH
Clock Input Fmax (MHz) LUTs FFs LUT-FF Pairs DSP48s 36k BRAMs 18k BRAMs Speedfile Status
xc7k325tf bg676 1 xc7k325tfbg676-1_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new AXI4LITE 0 0 0 0 0 0 0 clk 344 248 423 34 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325tf bg676 1 xc7k325tfbg676-1_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old AXI4LITE 0 0 0 0 0 0 0 clk 298 391 424 30 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325tf bg676 1 xc7k325tfbg676-1_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new AXI4LITE 0 0 0 0 0 0 0 clk 313 532 623 195 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325tf bg676 1 xc7k325tfbg676-1_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old AXI4LITE 0 0 0 0 0 0 0 clk 274 655 624 199 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325tf bg676 1 xc7k325tfbg676-1_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new AXI4MM 0 0 0 0 0 0 0 clk 344 248 423 34 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325tf bg676 1 xc7k325tfbg676-1_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old AXI4MM 0 0 0 0 0 0 0 clk 298 391 424 30 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325tf bg676 1 xc7k325tfbg676-1_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new AXI4MM 0 0 0 0 0 0 0 clk 313 532 623 195 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325tf bg676 1 xc7k325tfbg676-1_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old AXI4MM 0 0 0 0 0 0 0 clk 274 655 624 199 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325tf bg676 1 xc7k325tfbg676-1_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new GENERIC 0 0 0 0 0 0 0 clk 337 253 423 31 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325tf bg676 1 xc7k325tfbg676-1_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old GENERIC 0 0 0 0 0 0 0 clk 313 388 424 34 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325tf bg676 1 xc7k325tfbg676-1_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new GENERIC 0 0 0 0 0 0 0 clk 321 532 623 201 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325tf bg676 1 xc7k325tfbg676-1_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old GENERIC 0 0 0 0 0 0 0 clk 313 667 624 202 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325tf bg676 1 xc7k325tfbg676-1_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new ICAP 0 0 0 0 0 0 0 clk 344 253 423 30 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325tf bg676 1 xc7k325tfbg676-1_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old ICAP 0 0 0 0 0 0 0 clk 306 387 424 41 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325tf bg676 1 xc7k325tfbg676-1_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new ICAP 0 0 0 0 0 0 0 clk 306 530 623 198 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325tf bg676 1 xc7k325tfbg676-1_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old ICAP 0 0 0 0 0 0 0 clk 298 661 624 204 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325tf bg676 1 xc7k325tfbg676-1_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new USR_ACCESS 0 0 0 0 0 0 0 clk 344 250 423 32 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325tf bg676 1 xc7k325tfbg676-1_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old USR_ACCESS 0 0 0 0 0 0 0 clk 306 387 424 34 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325tf bg676 1 xc7k325tfbg676-1_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new USR_ACCESS 0 0 0 0 0 0 0 clk 337 519 623 209 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325tf bg676 1 xc7k325tfbg676-1_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old USR_ACCESS 0 0 0 0 0 0 0 clk 298 667 624 206 0 0 0 PRODUCTION 1.12 2017-02-17

Kintex UltraScale

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
RESET_ACTIVE_LEVEL
CTRL_INTERFACE_TYPE
CTRL_ADDR_WIDTH
STS_HIST_BUFFER_WHEN_FULL
DP_PROTOCOL
PROTOCOL_RESET_ACTIVE_LEVEL
DP_AXI_ID_WIDTH
DP_AXI_AWUSER_WIDTH
DP_AXI_WUSER_WIDTH
DP_AXI_BUSER_WIDTH
DP_AXI_ARUSER_WIDTH
DP_AXI_RUSER_WIDTH
Clock Input Fmax (MHz) LUTs FFs LUT-FF Pairs DSP48s 36k BRAMs 18k BRAMs Speedfile Status
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new AXI4LITE 0 0 0 0 0 0 0 clk 391 238 423 36 0 0 0 PRODUCTION 1.24.01 01-12-2017
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old AXI4LITE 0 0 0 0 0 0 0 clk 337 319 424 49 0 0 0 PRODUCTION 1.24.01 01-12-2017
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new AXI4LITE 0 0 0 0 0 0 0 clk 344 436 623 131 0 0 0 PRODUCTION 1.24.01 01-12-2017
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old AXI4LITE 0 0 0 0 0 0 0 clk 352 530 624 132 0 0 0 PRODUCTION 1.24.01 01-12-2017
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new AXI4MM 0 0 0 0 0 0 0 clk 391 238 423 36 0 0 0 PRODUCTION 1.24.01 01-12-2017
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old AXI4MM 0 0 0 0 0 0 0 clk 337 319 424 49 0 0 0 PRODUCTION 1.24.01 01-12-2017
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new AXI4MM 0 0 0 0 0 0 0 clk 344 436 623 131 0 0 0 PRODUCTION 1.24.01 01-12-2017
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old AXI4MM 0 0 0 0 0 0 0 clk 352 530 624 132 0 0 0 PRODUCTION 1.24.01 01-12-2017
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new GENERIC 0 0 0 0 0 0 0 clk 391 242 423 32 0 0 0 PRODUCTION 1.24.01 01-12-2017
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old GENERIC 0 0 0 0 0 0 0 clk 360 320 424 38 0 0 0 PRODUCTION 1.24.01 01-12-2017
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new GENERIC 0 0 0 0 0 0 0 clk 375 491 623 191 0 0 0 PRODUCTION 1.24.01 01-12-2017
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old GENERIC 0 0 0 0 0 0 0 clk 352 529 624 137 0 0 0 PRODUCTION 1.24.01 01-12-2017
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new ICAP 0 0 0 0 0 0 0 clk 399 233 423 38 0 0 0 PRODUCTION 1.24.01 01-12-2017
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old ICAP 0 0 0 0 0 0 0 clk 352 318 424 42 0 0 0 PRODUCTION 1.24.01 01-12-2017
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new ICAP 0 0 0 0 0 0 0 clk 360 436 623 140 0 0 0 PRODUCTION 1.24.01 01-12-2017
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old ICAP 0 0 0 0 0 0 0 clk 344 518 624 141 0 0 0 PRODUCTION 1.24.01 01-12-2017
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new USR_ACCESS 0 0 0 0 0 0 0 clk 391 240 423 39 0 0 0 PRODUCTION 1.24.01 01-12-2017
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old USR_ACCESS 0 0 0 0 0 0 0 clk 375 357 424 39 0 0 0 PRODUCTION 1.24.01 01-12-2017
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new USR_ACCESS 0 0 0 0 0 0 0 clk 391 488 623 197 0 0 0 PRODUCTION 1.24.01 01-12-2017
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old USR_ACCESS 0 0 0 0 0 0 0 clk 352 521 624 146 0 0 0 PRODUCTION 1.24.01 01-12-2017

Kintex UltraScale+

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
RESET_ACTIVE_LEVEL
CTRL_INTERFACE_TYPE
CTRL_ADDR_WIDTH
STS_HIST_BUFFER_WHEN_FULL
DP_PROTOCOL
PROTOCOL_RESET_ACTIVE_LEVEL
DP_AXI_ID_WIDTH
DP_AXI_AWUSER_WIDTH
DP_AXI_WUSER_WIDTH
DP_AXI_BUSER_WIDTH
DP_AXI_ARUSER_WIDTH
DP_AXI_RUSER_WIDTH
Clock Input Fmax (MHz) LUTs FFs LUT-FF Pairs DSP48s 36k BRAMs 18k BRAMs Speedfile Status
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new AXI4LITE 0 0 0 0 0 0 0 clk 594 241 423 31 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old AXI4LITE 0 0 0 0 0 0 0 clk 548 360 424 43 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new AXI4LITE 0 0 0 0 0 0 0 clk 524 499 623 198 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old AXI4LITE 0 0 0 0 0 0 0 clk 524 634 624 198 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new AXI4MM 0 0 0 0 0 0 0 clk 594 241 423 31 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old AXI4MM 0 0 0 0 0 0 0 clk 548 360 424 43 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new AXI4MM 0 0 0 0 0 0 0 clk 524 499 623 198 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old AXI4MM 0 0 0 0 0 0 0 clk 524 634 624 198 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new GENERIC 0 0 0 0 0 0 0 clk 556 242 423 28 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old GENERIC 0 0 0 0 0 0 0 clk 524 368 424 35 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new GENERIC 0 0 0 0 0 0 0 clk 556 498 623 189 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old GENERIC 0 0 0 0 0 0 0 clk 532 624 624 193 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new ICAP 0 0 0 0 0 0 0 clk 579 244 423 32 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old ICAP 0 0 0 0 0 0 0 clk 563 367 424 45 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new ICAP 0 0 0 0 0 0 0 clk 548 483 623 192 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old ICAP 0 0 0 0 0 0 0 clk 524 525 624 135 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new USR_ACCESS 0 0 0 0 0 0 0 clk 563 239 423 29 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old USR_ACCESS 0 0 0 0 0 0 0 clk 532 369 424 34 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new USR_ACCESS 0 0 0 0 0 0 0 clk 571 492 623 193 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old USR_ACCESS 0 0 0 0 0 0 0 clk 516 616 624 200 0 0 0 PRODUCTION 1.18.1 12-07-2017

Virtex-7

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
RESET_ACTIVE_LEVEL
CTRL_INTERFACE_TYPE
CTRL_ADDR_WIDTH
STS_HIST_BUFFER_WHEN_FULL
DP_PROTOCOL
PROTOCOL_RESET_ACTIVE_LEVEL
DP_AXI_ID_WIDTH
DP_AXI_AWUSER_WIDTH
DP_AXI_WUSER_WIDTH
DP_AXI_BUSER_WIDTH
DP_AXI_ARUSER_WIDTH
DP_AXI_RUSER_WIDTH
Clock Input Fmax (MHz) LUTs FFs LUT-FF Pairs DSP48s 36k BRAMs 18k BRAMs Speedfile Status
xc7vx690tf fg1157 1 xc7vx690tffg1157-1_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new AXI4LITE 0 0 0 0 0 0 0 clk 329 251 423 34 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690tf fg1157 1 xc7vx690tffg1157-1_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old AXI4LITE 0 0 0 0 0 0 0 clk 298 386 424 32 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690tf fg1157 1 xc7vx690tffg1157-1_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new AXI4LITE 0 0 0 0 0 0 0 clk 306 534 623 198 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690tf fg1157 1 xc7vx690tffg1157-1_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old AXI4LITE 0 0 0 0 0 0 0 clk 290 658 624 204 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690tf fg1157 1 xc7vx690tffg1157-1_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new AXI4MM 0 0 0 0 0 0 0 clk 329 251 423 34 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690tf fg1157 1 xc7vx690tffg1157-1_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old AXI4MM 0 0 0 0 0 0 0 clk 298 386 424 32 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690tf fg1157 1 xc7vx690tffg1157-1_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new AXI4MM 0 0 0 0 0 0 0 clk 306 534 623 198 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690tf fg1157 1 xc7vx690tffg1157-1_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old AXI4MM 0 0 0 0 0 0 0 clk 290 658 624 204 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690tf fg1157 1 xc7vx690tffg1157-1_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new GENERIC 0 0 0 0 0 0 0 clk 344 253 423 27 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690tf fg1157 1 xc7vx690tffg1157-1_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old GENERIC 0 0 0 0 0 0 0 clk 321 387 424 37 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690tf fg1157 1 xc7vx690tffg1157-1_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new GENERIC 0 0 0 0 0 0 0 clk 306 533 623 198 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690tf fg1157 1 xc7vx690tffg1157-1_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old GENERIC 0 0 0 0 0 0 0 clk 298 664 624 199 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690tf fg1157 1 xc7vx690tffg1157-1_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new ICAP 0 0 0 0 0 0 0 clk 306 252 423 33 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690tf fg1157 1 xc7vx690tffg1157-1_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old ICAP 0 0 0 0 0 0 0 clk 313 389 424 39 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690tf fg1157 1 xc7vx690tffg1157-1_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new ICAP 0 0 0 0 0 0 0 clk 298 528 623 199 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690tf fg1157 1 xc7vx690tffg1157-1_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old ICAP 0 0 0 0 0 0 0 clk 298 655 624 192 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690tf fg1157 1 xc7vx690tffg1157-1_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new USR_ACCESS 0 0 0 0 0 0 0 clk 306 247 423 36 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690tf fg1157 1 xc7vx690tffg1157-1_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old USR_ACCESS 0 0 0 0 0 0 0 clk 298 386 424 34 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690tf fg1157 1 xc7vx690tffg1157-1_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new USR_ACCESS 0 0 0 0 0 0 0 clk 329 519 623 202 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690tf fg1157 1 xc7vx690tffg1157-1_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old USR_ACCESS 0 0 0 0 0 0 0 clk 290 665 624 205 0 0 0 PRODUCTION 1.11 2014-09-11

Virtex UltraScale

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
RESET_ACTIVE_LEVEL
CTRL_INTERFACE_TYPE
CTRL_ADDR_WIDTH
STS_HIST_BUFFER_WHEN_FULL
DP_PROTOCOL
PROTOCOL_RESET_ACTIVE_LEVEL
DP_AXI_ID_WIDTH
DP_AXI_AWUSER_WIDTH
DP_AXI_WUSER_WIDTH
DP_AXI_BUSER_WIDTH
DP_AXI_ARUSER_WIDTH
DP_AXI_RUSER_WIDTH
Clock Input Fmax (MHz) LUTs FFs LUT-FF Pairs DSP48s 36k BRAMs 18k BRAMs Speedfile Status
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new AXI4LITE 0 0 0 0 0 0 0 clk 368 245 423 30 0 0 0 PRODUCTION 1.25.01 01-12-2017
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old AXI4LITE 0 0 0 0 0 0 0 clk 344 319 424 32 0 0 0 PRODUCTION 1.25.01 01-12-2017
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new AXI4LITE 0 0 0 0 0 0 0 clk 337 444 623 130 0 0 0 PRODUCTION 1.25.01 01-12-2017
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old AXI4LITE 0 0 0 0 0 0 0 clk 344 539 624 131 0 0 0 PRODUCTION 1.25.01 01-12-2017
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new AXI4MM 0 0 0 0 0 0 0 clk 368 245 423 30 0 0 0 PRODUCTION 1.25.01 01-12-2017
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old AXI4MM 0 0 0 0 0 0 0 clk 344 319 424 32 0 0 0 PRODUCTION 1.25.01 01-12-2017
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new AXI4MM 0 0 0 0 0 0 0 clk 337 444 623 130 0 0 0 PRODUCTION 1.25.01 01-12-2017
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old AXI4MM 0 0 0 0 0 0 0 clk 344 539 624 131 0 0 0 PRODUCTION 1.25.01 01-12-2017
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new GENERIC 0 0 0 0 0 0 0 clk 383 240 423 34 0 0 0 PRODUCTION 1.25.01 01-12-2017
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old GENERIC 0 0 0 0 0 0 0 clk 344 322 424 40 0 0 0 PRODUCTION 1.25.01 01-12-2017
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new GENERIC 0 0 0 0 0 0 0 clk 360 447 623 139 0 0 0 PRODUCTION 1.25.01 01-12-2017
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old GENERIC 0 0 0 0 0 0 0 clk 344 530 624 129 0 0 0 PRODUCTION 1.25.01 01-12-2017
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new ICAP 0 0 0 0 0 0 0 clk 383 239 423 34 0 0 0 PRODUCTION 1.25.01 01-12-2017
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old ICAP 0 0 0 0 0 0 0 clk 337 320 424 36 0 0 0 PRODUCTION 1.25.01 01-12-2017
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new ICAP 0 0 0 0 0 0 0 clk 352 447 623 126 0 0 0 PRODUCTION 1.25.01 01-12-2017
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old ICAP 0 0 0 0 0 0 0 clk 368 627 624 200 0 0 0 PRODUCTION 1.25.01 01-12-2017
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new USR_ACCESS 0 0 0 0 0 0 0 clk 391 239 423 32 0 0 0 PRODUCTION 1.25.01 01-12-2017
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old USR_ACCESS 0 0 0 0 0 0 0 clk 352 314 424 31 0 0 0 PRODUCTION 1.25.01 01-12-2017
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new USR_ACCESS 0 0 0 0 0 0 0 clk 383 487 623 199 0 0 0 PRODUCTION 1.25.01 01-12-2017
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old USR_ACCESS 0 0 0 0 0 0 0 clk 360 520 624 150 0 0 0 PRODUCTION 1.25.01 01-12-2017

Virtex UltraScale+

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
RESET_ACTIVE_LEVEL
CTRL_INTERFACE_TYPE
CTRL_ADDR_WIDTH
STS_HIST_BUFFER_WHEN_FULL
DP_PROTOCOL
PROTOCOL_RESET_ACTIVE_LEVEL
DP_AXI_ID_WIDTH
DP_AXI_AWUSER_WIDTH
DP_AXI_WUSER_WIDTH
DP_AXI_BUSER_WIDTH
DP_AXI_ARUSER_WIDTH
DP_AXI_RUSER_WIDTH
Clock Input Fmax (MHz) LUTs FFs LUT-FF Pairs DSP48s 36k BRAMs 18k BRAMs Speedfile Status
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new AXI4LITE 0 0 0 0 0 0 0 clk 579 245 423 30 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old AXI4LITE 0 0 0 0 0 0 0 clk 493 369 424 28 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new AXI4LITE 0 0 0 0 0 0 0 clk 556 500 623 208 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old AXI4LITE 0 0 0 0 0 0 0 clk 524 625 624 192 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new AXI4MM 0 0 0 0 0 0 0 clk 579 245 423 30 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old AXI4MM 0 0 0 0 0 0 0 clk 493 369 424 28 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new AXI4MM 0 0 0 0 0 0 0 clk 556 500 623 208 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old AXI4MM 0 0 0 0 0 0 0 clk 524 625 624 192 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new GENERIC 0 0 0 0 0 0 0 clk 540 244 423 36 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old GENERIC 0 0 0 0 0 0 0 clk 532 370 424 36 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new GENERIC 0 0 0 0 0 0 0 clk 571 495 623 195 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old GENERIC 0 0 0 0 0 0 0 clk 540 632 624 202 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new ICAP 0 0 0 0 0 0 0 clk 571 238 423 34 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old ICAP 0 0 0 0 0 0 0 clk 524 365 424 46 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new ICAP 0 0 0 0 0 0 0 clk 524 500 623 198 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old ICAP 0 0 0 0 0 0 0 clk 556 514 624 131 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new USR_ACCESS 0 0 0 0 0 0 0 clk 563 234 423 32 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old USR_ACCESS 0 0 0 0 0 0 0 clk 508 359 424 34 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new USR_ACCESS 0 0 0 0 0 0 0 clk 563 485 623 194 0 0 0 PRODUCTION 1.18.1 12-07-2017
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old USR_ACCESS 0 0 0 0 0 0 0 clk 540 622 624 200 0 0 0 PRODUCTION 1.18.1 12-07-2017

Zynq-7000

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
RESET_ACTIVE_LEVEL
CTRL_INTERFACE_TYPE
CTRL_ADDR_WIDTH
STS_HIST_BUFFER_WHEN_FULL
DP_PROTOCOL
PROTOCOL_RESET_ACTIVE_LEVEL
DP_AXI_ID_WIDTH
DP_AXI_AWUSER_WIDTH
DP_AXI_WUSER_WIDTH
DP_AXI_BUSER_WIDTH
DP_AXI_ARUSER_WIDTH
DP_AXI_RUSER_WIDTH
Clock Input Fmax (MHz) LUTs FFs LUT-FF Pairs DSP48s 36k BRAMs 18k BRAMs Speedfile Status
xc7z045fb g676 1 xc7z045fbg676-1_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new AXI4LITE 0 0 0 0 0 0 0 clk 329 250 423 31 0 0 0 PRODUCTION 1.11 2014-09-11
xc7z045fb g676 1 xc7z045fbg676-1_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old AXI4LITE 0 0 0 0 0 0 0 clk 313 389 424 40 0 0 0 PRODUCTION 1.11 2014-09-11
xc7z045fb g676 1 xc7z045fbg676-1_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new AXI4LITE 0 0 0 0 0 0 0 clk 313 532 623 198 0 0 0 PRODUCTION 1.11 2014-09-11
xc7z045fb g676 1 xc7z045fbg676-1_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old AXI4LITE 0 0 0 0 0 0 0 clk 298 662 624 200 0 0 0 PRODUCTION 1.11 2014-09-11
xc7z045fb g676 1 xc7z045fbg676-1_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new AXI4MM 0 0 0 0 0 0 0 clk 329 250 423 31 0 0 0 PRODUCTION 1.11 2014-09-11
xc7z045fb g676 1 xc7z045fbg676-1_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old AXI4MM 0 0 0 0 0 0 0 clk 313 389 424 40 0 0 0 PRODUCTION 1.11 2014-09-11
xc7z045fb g676 1 xc7z045fbg676-1_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new AXI4MM 0 0 0 0 0 0 0 clk 313 532 623 198 0 0 0 PRODUCTION 1.11 2014-09-11
xc7z045fb g676 1 xc7z045fbg676-1_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old AXI4MM 0 0 0 0 0 0 0 clk 298 662 624 200 0 0 0 PRODUCTION 1.11 2014-09-11
xc7z045fb g676 1 xc7z045fbg676-1_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new GENERIC 0 0 0 0 0 0 0 clk 329 250 423 32 0 0 0 PRODUCTION 1.11 2014-09-11
xc7z045fb g676 1 xc7z045fbg676-1_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old GENERIC 0 0 0 0 0 0 0 clk 306 388 424 37 0 0 0 PRODUCTION 1.11 2014-09-11
xc7z045fb g676 1 xc7z045fbg676-1_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new GENERIC 0 0 0 0 0 0 0 clk 329 533 623 205 0 0 0 PRODUCTION 1.11 2014-09-11
xc7z045fb g676 1 xc7z045fbg676-1_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old GENERIC 0 0 0 0 0 0 0 clk 306 656 624 199 0 0 0 PRODUCTION 1.11 2014-09-11
xc7z045fb g676 1 xc7z045fbg676-1_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new ICAP 0 0 0 0 0 0 0 clk 337 252 423 33 0 0 0 PRODUCTION 1.11 2014-09-11
xc7z045fb g676 1 xc7z045fbg676-1_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old ICAP 0 0 0 0 0 0 0 clk 298 387 424 36 0 0 0 PRODUCTION 1.11 2014-09-11
xc7z045fb g676 1 xc7z045fbg676-1_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new ICAP 0 0 0 0 0 0 0 clk 298 530 623 200 0 0 0 PRODUCTION 1.11 2014-09-11
xc7z045fb g676 1 xc7z045fbg676-1_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old ICAP 0 0 0 0 0 0 0 clk 306 661 624 198 0 0 0 PRODUCTION 1.11 2014-09-11
xc7z045fb g676 1 xc7z045fbg676-1_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new USR_ACCESS 0 0 0 0 0 0 0 clk 344 250 423 32 0 0 0 PRODUCTION 1.11 2014-09-11
xc7z045fb g676 1 xc7z045fbg676-1_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old USR_ACCESS 0 0 0 0 0 0 0 clk 321 386 424 31 0 0 0 PRODUCTION 1.11 2014-09-11
xc7z045fb g676 1 xc7z045fbg676-1_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new USR_ACCESS 0 0 0 0 0 0 0 clk 321 518 623 200 0 0 0 PRODUCTION 1.11 2014-09-11
xc7z045fb g676 1 xc7z045fbg676-1_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old USR_ACCESS 0 0 0 0 0 0 0 clk 298 655 624 202 0 0 0 PRODUCTION 1.11 2014-09-11

Zynq UltraScale+

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
RESET_ACTIVE_LEVEL
CTRL_INTERFACE_TYPE
CTRL_ADDR_WIDTH
STS_HIST_BUFFER_WHEN_FULL
DP_PROTOCOL
PROTOCOL_RESET_ACTIVE_LEVEL
DP_AXI_ID_WIDTH
DP_AXI_AWUSER_WIDTH
DP_AXI_WUSER_WIDTH
DP_AXI_BUSER_WIDTH
DP_AXI_ARUSER_WIDTH
DP_AXI_RUSER_WIDTH
Clock Input Fmax (MHz) LUTs FFs LUT-FF Pairs DSP48s 36k BRAMs 18k BRAMs Speedfile Status
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new AXI4LITE 0 0 0 0 0 0 0 clk 563 242 423 30 0 0 0 PRODUCTION 1.18.1 12-07-2017
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old AXI4LITE 0 0 0 0 0 0 0 clk 556 369 424 40 0 0 0 PRODUCTION 1.18.1 12-07-2017
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new AXI4LITE 0 0 0 0 0 0 0 clk 524 497 623 192 0 0 0 PRODUCTION 1.18.1 12-07-2017
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old AXI4LITE 0 0 0 0 0 0 0 clk 532 626 624 203 0 0 0 PRODUCTION 1.18.1 12-07-2017
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new AXI4MM 0 0 0 0 0 0 0 clk 563 242 423 30 0 0 0 PRODUCTION 1.18.1 12-07-2017
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old AXI4MM 0 0 0 0 0 0 0 clk 556 369 424 40 0 0 0 PRODUCTION 1.18.1 12-07-2017
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new AXI4MM 0 0 0 0 0 0 0 clk 524 497 623 192 0 0 0 PRODUCTION 1.18.1 12-07-2017
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old AXI4MM 0 0 0 0 0 0 0 clk 532 626 624 203 0 0 0 PRODUCTION 1.18.1 12-07-2017
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new GENERIC 0 0 0 0 0 0 0 clk 625 242 423 34 0 0 0 PRODUCTION 1.18.1 12-07-2017
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old GENERIC 0 0 0 0 0 0 0 clk 563 366 424 42 0 0 0 PRODUCTION 1.18.1 12-07-2017
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new GENERIC 0 0 0 0 0 0 0 clk 594 498 623 190 0 0 0 PRODUCTION 1.18.1 12-07-2017
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old GENERIC 0 0 0 0 0 0 0 clk 540 622 624 202 0 0 0 PRODUCTION 1.18.1 12-07-2017
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new ICAP 0 0 0 0 0 0 0 clk 587 243 423 38 0 0 0 PRODUCTION 1.18.1 12-07-2017
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old ICAP 0 0 0 0 0 0 0 clk 563 368 424 39 0 0 0 PRODUCTION 1.18.1 12-07-2017
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new ICAP 0 0 0 0 0 0 0 clk 563 498 623 203 0 0 0 PRODUCTION 1.18.1 12-07-2017
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old ICAP 0 0 0 0 0 0 0 clk 540 517 624 145 0 0 0 PRODUCTION 1.18.1 12-07-2017
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new USR_ACCESS 0 0 0 0 0 0 0 clk 571 246 423 32 0 0 0 PRODUCTION 1.18.1 12-07-2017
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old USR_ACCESS 0 0 0 0 0 0 0 clk 563 370 424 42 0 0 0 PRODUCTION 1.18.1 12-07-2017
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new USR_ACCESS 0 0 0 0 0 0 0 clk 563 496 623 194 0 0 0 PRODUCTION 1.18.1 12-07-2017
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old USR_ACCESS 0 0 0 0 0 0 0 clk 508 634 624 203 0 0 0 PRODUCTION 1.18.1 12-07-2017

COPYRIGHT

Copyright 2018 Xilinx, Inc. Xilinx, the Xilinx logo, Artix, ISE, Kintex, Spartan, Virtex, Vivado, Zynq, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. All other trademarks are the property of their respective owners.

LEGAL INFORMATION: PLEASE READ

The information disclosed to you hereunder (the "Materials") is provided solely for the selection and use of Xilinx products. To the maximum extent permitted by applicable law: (1) Materials are made available "AS IS" and with all faults, Xilinx hereby DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and (2) Xilinx shall not be liable (whether in contract or tort, including negligence, or under any other theory of liability) for any loss or damage of any kind or nature related to, arising under, or in connection with, the Materials (including your use of the Materials), including for any direct, indirect, special, incidental, or consequential loss or damage (including loss of data, profits, goodwill, or any type of loss or damage suffered as a result of any action brought by a third party) even if such damage or loss was reasonably foreseeable or Xilinx had been advised of the possibility of the same. Xilinx assumes no obligation to correct any errors contained in the Materials or to notify you of updates to the Materials or to product specifications. You may not reproduce, modify, distribute, or publicly display the Materials without prior written consent. Certain products are subject to the terms and conditions of Xilinx's limited warranty, please refer to Xilinx's Terms of Sale which can be viewed at https://www.xilinx.com/legal.htm#tos; IP cores may be subject to warranty and support terms contained in a license issued to you by Xilinx. Xilinx products are not designed or intended to be fail-safe or for use in any application requiring fail-safe performance; you assume sole risk and liability for use of Xilinx products in such critical applications, please refer to Xilinx's Terms of Sale which can be viewed at https://www.xilinx.com/legal.htm#tos.