Vivado IP Release Notes
This article contains a list of all 'Vivado™ IP Release Notes - All IP Change Log Information' answer records and the associated Vivado Tools release.
发布者: AMD
The 10G Ethernet IP core enables 1-step and 2-step 1588 hardware timestamping delivered through IP Integrator.
For UltraScale™ and UltraScale+™ device support, refer to the 10G/25G Ethernet Subsystem.
The 10 Gigabit Ethernet subsytem provides a 10 Gigabit Ethernet MAC and PCS/PMA in 10GBASE-R/KR modes to provide a 10 Gigabit Ethernet port. The transmit and receive data interfaces use AXI4-Stream interfaces. An optional AXI4-Lite interface is used for the control interface to internal registers.
The 10G Ethernet IP core enables 1-step and 2-step 1588 hardware time stamping delivered through IP Integrator with 10GBASE-R. This IP core utilizes the AMD 10G Ethernet MAC IP core connected to the 10GBASE-R or 10GBASE-KR IP.The control interface to internal registers is via a 32-bit AXI Lite Interface.The transmit and receive data interface is via the AXI4-Streaming interface. There is no additional charge for access to the 10G Ethernet Subsystem. However, 10G Ethernet MAC and 10GBASE-KR are fee based IP cores and you will need to have the proper licensing keys based upon your configuration requirements.
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