Vivado IP Release Notes
This article contains a list of all 'Vivado™ IP Release Notes - All IP Change Log Information' answer records and the associated Vivado Tools release.
-
图像缩放
AXI 1G/2.5G Ethernet Subsystem
发布者: AMD
This core provides a control interface to internal registers via a 32-bit AXI4-Lite Interface subset. This AXI4-Lite slave interface supports single beat read and write data transfers (no burst transfers).
- 设计工具支持: Vivado Software
- 捆绑产品: Vivado Software, ISE Design Suite
- 许可: End User License Agreement
- 器件支持: Artix 7, Kintex 7, Kintex UltraScale, Kintex UltraScale+, Spartan 7, Versal AI Core, Versal Premium, Virtex 7, Virtex UltraScale, Virtex UltraScale+, Zynq 7000, Zynq UltraScale+ MPSoC