Vivado IP Release Notes
This article contains a list of all 'Vivado™ IP Release Notes - All IP Change Log Information' answer records and the associated Vivado Tools release.
发布者: AMD
The AMD LogiCORE™ 25G IEEE 802.3by RS-FEC IP core implements the Reed-Solomon Forward Error Correction (RS-FEC) sublayer.
AMD offers the 25 Gigabit IEEE 802.3by Reed-Solomon Forward Error Correction (RS-FEC) IP core for data center and enterprise applications. This core is designed to the IEEE 802.3by and 25G Ethernet Consortium Schedule 3 specification and connects seamlessly to the AMD soft 25G Ethernet Subsystem IP on Virtex™ UltraScale™, Virtex UltraScale+™, Kintex™ UltraScale+, and Zynq™ UltraScale+ devices.
Certain AMD technologies may require third-party enablement or activation. Supported features may vary by operating system. Please confirm with system manufacturer for specific features. No technology or product can be completely secure.