When I generate a pcore in the Create / Import Peripheral (CIP) Wizard with 3 registers, there is a wrong number for C_ARD_NUM_CE_ARRAY:
Analyzing hierarchy for entity <user_logic>: C_NUM_REG = 3
Analyzing hierarchy for entity <plbv46_slave_single>:
C_ARD_NUM_CE_ARRAY = (4)
reading baseaddress..
C_BASEADDR + 0x0 ok
C_BASEADDR + 0x4 ok
C_BASEADDR + 0x8 ok
C_BASEADDR + 0xC
MicroBlaze stalls when reading the 4th (non-existent) register.
However, when I make a pcore with 2 registers, ce_array is correct:
Analyzing hierarchy for entity <user_logic>: C_NUM_REG = 2
Analyzing hierarchy for entity <plbv46_slave_single>: C_ARD_NUM_CE_ARRAY = (2)
There is no register that exists at that address space, therefore, the C_INCLUDE_DPHASE_TIMER parameter needs to be set to 1 to allow data phase timeout. This parameter can be set either in the MHS or the MPD file. More information about this parameter can be found in the IPIF data sheet.
AR# 32020 | |
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日期 | 12/15/2012 |
状态 | Active |
Type | 综合文章 |