This Master Answer Record contains a list of all 11.x Answer Records. The list contains current known issues as well as issues resolved in a particular release.
Known Issues: (Xilinx Answer 32624) 11 EDK - What patches are currently available for the EDK? (Xilinx Answer 34689) 11.5 EDK - "JVM terminated. Exit code=127..." (Xilinx Answer 34678) 11.5 EDK, XPS_LL_TEMAC - "ERROR:PhysDesignRules - Invalid configuration..." (Xilinx Answer 34742) 11.5 EDK, plbv46_pcie_v4_04_a - Spartan-6 BlockRam Memory collisions occur (Xilinx Answer 34566) 11.5 EDK - Ethernet Lite core on a SP601 board might not meet timing (Xilinx Answer 34564) 11.5 EDK - Clock_Generator v3.00.a, v3.02.a, Virtex-6 MMCM CLKFBOUT_MULT_F = 2, 3, 4 not valid (Xilinx Answer 34613) 11.5 EDK - ERROR:Place:1012 - A clock IOB / DCM component pair have been found that are not place at an optimal clock IOB / DCM site pair (Xilinx Answer 33008) 11.1 EDK - The BSP with the UartNS550 for MontaVista 5.0.24 kernel fails to boot (Xilinx Answer 33876) 11 EDK - Base System Builder (BSB) appears to stop when I frequently use the back / forward buttons while generating a generic board (Xilinx Answer 32699) 11 EDK - "ERROR:EDK:1519 - ... address space overlap!" (Xilinx Answer 32726) 11 EDK - MicroBlaze processor interrupt does not occur after reset (Xilinx Answer 31279) 11 EDK - Why am I unable to view the IP PDF documents in Linux? (Xilinx Answer 23657) 11 EDK - "WARNING:Data2MEM:53 File 'system.bmm' was empty or had no content." (Xilinx Answer 23792) 11 EDK - "ERROR: Not enough scratch pad memory to program the flash" (Xilinx Answer 29013) 11 EDK - "ERROR: the HDL template for system.xmp could not be found. Make sure the XPS project is complete." (Xilinx Answer 18265) 11 EDK - "ERROR: Unable to connect to PowerPC target. Invalid Processor Version No 0x00000000" (Xilinx Answer 29464) 11 EDK - "ERROR:HDLParsers:3621 - "system.vhd" Line 31. The basic identifier... is illegal because it ends with an underline character (VHDL IEEE 1076-2000 LRM 13.3.1)." (Xilinx Answer 18349) 11 EDK - "ERROR:MDT - ...\system.mhs line xx Invalid Signal name sig_name -- PlatGen doesn't support vector slicing" (Xilinx Answer 22891) 11 EDK - "ERROR:NgdBuild:455, 463, 925" when adding a custom peripheral (Xilinx Answer 30309) 11 EDK - "ERROR:Place:872 - ... the delay controller that calibrates this delay element has not been used" (Xilinx Answer 31999) 11 EDK - "Warning: integer constant is too large for 'long' type" (Xilinx Answer 20060) 11 EDK - "WARNING:MDT - MDM Peripheral Not Detected on Hardware - XMD does not connect to MicroBlaze via the MDM module on Virtex-4" (Xilinx Answer 31424) 11 EDK - /dev/fs/C/cygdrive/c/EDK/sw/XilinxProcessorIPLib/drivers/<>/src/: No such file or directory (Xilinx Answer 21075) 11 EDK - Achieving full performance with the Virtex-4 FPGA PowerPC405 devices using the Xilinx GNU Compiler (Xilinx Answer 24442) 11 EDK - After creating and deleting several files in a XilMFS, the file system is full (Xilinx Answer 25252) 11 EDK - An error message occurs when I attempt to convert an ".elf" file to binary file using mb-objcopy (Xilinx Answer 24907) 11 EDK - Are pragma directives supported for MicroBlaze processor? (Xilinx Answer 16547) 11 EDK - Assigning "C" functions to a specific memory location (Xilinx Answer 32263) 11 EDK - Attempting to generate VHDL/Verilog Template for XMP file causes project to become out of date in an ISE design tools project (Xilinx Answer 31848) 11 EDK - Can "iba_trig_in" be connected to the PowerPC 440 for hardware/software co-debug? (Xilinx Answer 30180) 11 EDK - Can "relative" paths be used in SDK to point to application source code? (Xilinx Answer 30219) 11 EDK - Can I debug ELF-only software applications in XPS? (Xilinx Answer 23344) 11 EDK - Can SDK interpret Threads, Mutex and Semaphores display their state in graphical manner? (Xilinx Answer 32529) 11 EDK - Differences between 10.1 and 11 in libgen's Tcl API (Xilinx Answer 29146) 11 EDK - DMA does not work when cache is enabled (Xilinx Answer 22796) 11 EDK - Does EDK with GDB support inline (software) breakpoints for MicroBlaze processor? (Xilinx Answer 24926) 11 EDK - Does EMC support burst mode with flash? (Xilinx Answer 30228) 11 EDK - Does the PPC guard memory or not? (Xilinx Answer 31607) 11 EDK - Does Xilkernel support the FPU Core design for the Power PC 405 and Power PC 440? (Xilinx Answer 32549) 11 EDK - "Error "Invalid hardware Specification file"" (Xilinx Answer 25246) 11 EDK - "Error: "Could not write metadata for: /ppc405_0_sw_platform"" (Xilinx Answer 23353) 11 EDK - "Error: "ERROR:NgdBuild:927 - Failed to process BMM file edkBmmFile.bmm"" (Xilinx Answer 24145) 11 EDK - "Error: "\EDK\cygwin\bin\bash.exe (4236): *** couldn't allocate cygwin heap, Win32 error 487" (Xilinx Answer 32649) 11 EDK - "ERROR:PersonalityModule:7 - Unable to open Xilinx data file for Vendor/Device Module "xc9500xl" (Xilinx Answer 31254) 11 EDK - FlashWriter Error: "write cmdbuffer failed 20000015" (Xilinx Answer 23012) 11 EDK - For 36 Kb of IOCM block RAM memory, is it necessary to allot 64 Kb block RAM memory? (Xilinx Answer 29379) 11 EDK - GCC 4.1.1 support for MicroBlaze processor (Xilinx Answer 29380) 11 EDK - GCC 4.1.1 support for PowerPC (Xilinx Answer 25335) 11 EDK - GDB cannot connect to XMD. Closed GDB connection from 127.0.0.1 on port 1716 (Xilinx Answer 25442) 11 EDK - How can I add support for non-Xilinx devices in XMD? (Xilinx Answer 29926) 11 EDK - How can I create a user library in SDK? (Xilinx Answer 23748) 11 EDK - How can I execute MicroBlaze processor code directly from flash? (Xilinx Answer 23390) 11 EDK - How can I make my SDRAM controller visible in the Linker Script Generation GUI? (Xilinx Answer 23013) 11 EDK - How can I measure the processor execution cycles in MicroBlaze processor? (Xilinx Answer 24352) 11 EDK - How can I set compiler optimization for building BSP? (Xilinx Answer 30478) 11 EDK - How can I use a DCR start address in the PPC440 that is something other than 0x00? (Xilinx Answer 24910) 11 EDK - How can I use a third-party synthesis tool with XPS? (Xilinx Answer 19240) 11 EDK - How can I use functions compiled with LibGen in my C++ application? (Xilinx Answer 21791) 11 EDK - How do I change implementation options in EDK? (Xilinx Answer 25242) 11 EDK - How do I configure my FPGA with Intel Strata Flash? (Xilinx Answer 29857) 11 EDK - How do I connect signals to the data port of ChipScope Pro ILA Core? (Xilinx Answer 17581) 11 EDK - How do I connect to two PPCs using XMD? (Xilinx Answer 21639) 11 EDK - How do I divide the .text section of the three different .text file sections on different memories in Linker script? (Xilinx Answer 29979) 11 EDK - How do I enable MMU support for MicroBlaze processor on Spartan-3 devices? (Xilinx Answer 23025) 11 EDK - How do I generate a GNU linker MAP file with XPS? (Xilinx Answer 18164) 11 EDK - How do I generate an SVF file using EDK? (Xilinx Answer 18561) 11 EDK - How do I include inline assembly within my C source files? (Xilinx Answer 23592) 11 EDK - How do I include Verilog header files for my custom Verilog IP? (Xilinx Answer 23633) 11 EDK - How do I insert ChipScope analyzer when my EDK project is a sub-system? (Xilinx Answer 17151) 11 EDK - How do I link and execute a program so that it runs completely out of the PowerPC caches? (Xilinx Answer 32143) 11 EDK - How do I migrate my old EDK designs into 11 when there are deprecated cores? (Xilinx Answer 23812) 11 EDK - How do I prevent XPS from inserting BUFGs? (Xilinx Answer 22031) 11 EDK - How do I run the EDK flow from the command line? (Xilinx Answer 29981) 11 EDK - How do we know the start address of the heap and stack sections? (Xilinx Answer 19133) 11 EDK - How do you split bits off a bus in an MHS file? (Xilinx Answer 31256) 11 EDK - How to add a user software library in a project? (Xilinx Answer 32620) 11 EDK - How to connect to two boards with USB Cables to one PC using XMD simultaneously (Xilinx Answer 22602) 11 EDK - How to debug successfully using GDB (Xilinx Answer 29787) 11 EDK - How to properly print the floating point number in C code (Xilinx Answer 32266) 11 EDK - I am unable to disable a watch point that I set in SDK (Xilinx Answer 31442) 11 EDK - I cannot add my custom IP core to my EDK design (Xilinx Answer 29864) 11 EDK - I cannot download bitstreams to the targeted FPGA, even though I can accomplish this with iMPACT " (Xilinx Answer 31956) 11 EDK - I need to customize my CPU initialization files. What is the order in which they need to be linked? (Xilinx Answer 22525) 11 EDK - Inline functions give errors during compilation when optimization is turned off (Xilinx Answer 25081) 11 EDK - Interrupt controller self test example does not work in GDB (Xilinx Answer 22603) 11 EDK - Is it possible to debug a Xilkernel design in GDB? (Xilinx Answer 20613) 11 EDK - Is it possible to view the assembly (.s) files generated by the GNU Compiler (GCC) from within EDK? (Xilinx Answer 32254) 11 EDK - Local Linux users and the need to set the global repository path (Xilinx Answer 25039) 11 EDK - LwIP and TEMAC error: "contrib/ports/v2pro/netif/xtemacif.c:584: multiple definition of `lwip_init'" (Xilinx Answer 31782) 11 EDK - make -f system.make netlist started. make: *** No rule to make target `D:\Xilinx', needed by `implementation/ppc405_0_wrapper.ngc'. Stop. (Xilinx Answer 30878) 11 EDK - malloc returns a NULL pointer after a CPU reset (Xilinx Answer 30590) 11 EDK - mb-gcc errors out when used with -G16 (Xilinx Answer 25280) 11 EDK - ML demo boards do not load XPS-generated bitstream from Flash (Xilinx Answer 21108) 11 EDK - Multiple MicroBlaze processor debugging (Xilinx Answer 30637) 11 EDK - My 3rd-party RTOS seems to have sub-optimal performance on the PPC440 in Virtex-5 FPGA (Xilinx Answer 32269) 11 EDK - My software platform settings are not preserved when I export my project to SDK (Xilinx Answer 32253) 11 EDK - Network Windows users and the need to install M/S Redistribution Libraries (Xilinx Answer 20068) 11 EDK - PowerPC-eabi-ld - "relocation truncated to fit: R_PPC_REL24 myFunction" (Xilinx Answer 24875) 11 EDK - powerpc-eabi-objump -S <file_name> does not intermix assembly with the source code (Xilinx Answer 24779) 11 EDK - Removing the -g compiler option in the Software Platform Settings seems to have no effect (Xilinx Answer 32076) 11 EDK - The FIFO Generator models in the XilinxCoreLib use different type declarations for the C_PRIM_FIFO_TYPE parameter between the VHDL version and the Verilog version (Xilinx Answer 30793) 11 EDK - The Power PC TLB (Translation Lookaside Buffer) has been invalidated (Xilinx Answer 29511) 11 EDK - The System ACE file does not load the software application when I use OCM (Xilinx Answer 24883) 11 EDK - Two Data Side OCM block RAM controllers connected to the same OCM bus do not work correctly (Xilinx Answer 31758) 11 EDK - "WARNING:ConstraintSystem:135 <INST: UniqueName:/system/EXPANDED/system/ppc405_0/ppc405_0\/IP...>: No instances of type FFS " (Xilinx Answer 31884) 11 EDK - What are the different implementation options between an XPS flow versus an ISE flow? (Xilinx Answer 17088) 11 EDK - What are the PowerPC registers defined in the SmartModel? (Xilinx Answer 19800) 11 EDK - What do the different GNU GCC optimization options specify? (Xilinx Answer 21330) 11 EDK - What is the difference between hardware and software breakpoints? (Xilinx Answer 25284) 11 EDK - What is the minimum frequency requirement for the DDR memory on a Spartan-3E device board? (Xilinx Answer 24759) 11 EDK - When I use the FPU in a PPC design, there seem to be random interrupts (Xilinx Answer 20666) 11 EDK - Where can I find the documentation for the GNU tools such as GCC, GAS, GAR and GLD? (Xilinx Answer 30440) 11 EDK - Where can I find the source files for EDK BFM Simulation (UG254)? (Xilinx Answer 20011) 11 EDK - Where can I find the vendor BSB files? (Xilinx Answer 30803) 11 EDK - Which version of ModelSim is supported in 11 EDK (Xilinx Answer 31981) 11 EDK - Why does all of my logic associated with the FSL bus and the connected peripheral get removed? (Xilinx Answer 32310) 11 EDK - Why does the C/C++ search not work in SDK? (Xilinx Answer 19592) 11 EDK - Why does the standard C printf() function use so much memory? (Xilinx Answer 22497) 11 EDK - XPS Error: "libportability.dll was not found" (Xilinx Answer 32413) 11 EDK - xps_uart16550_v2_00_b - The 'Error in receiver FiFO bit' LSR(24) in the Line Status Register is not working correctly (Xilinx Answer 32512) 11 EDK - XST has encountered a problem and needs to close; problems with the PCI and USB cores on Windows XP (Xilinx Answer 20805) 11 EDK Base System Builder (BSB) PowerPC JTAG signals brought to user I/O in a BSB-created design should be pulled up in the UCF (Xilinx Answer 24305) 11 EDK LibGen - "ERROR:Portability:90 - Command line error: Switch "-executable" is not allowed" (Xilinx Answer 21550) 11 EDK MicroBlaze processor/PowerPC - What is the difference between polled mode and interrupt-driven mode? (Xilinx Answer 32397) 11 EDK, xps_iic_v2_01_a - The data sheet needs to be updated for correct address offset for the 10-bit address in register description (Xilinx Answer 32411) 11 EDK, iic_v1_13_b - Software driver for xps_iic has the race condition (Xilinx Answer 21533) 11 EDK, LibGen - How do I reduce the size of the executable program (".elf" file)? (Xilinx Answer 24912) 11 EDK, MPMC v5.00.a - How do I create an NPI Core and connect it to MPMC in EDK? (Xilinx Answer 32414) 11 EDK, plbv46_plbv46_bridge_v1_01_a - The bus timeout on the secondary PLB bus is not handled correctly (Xilinx Answer 32416) 11 EDK, USB Software Drivers - The xusb_endpoint.c and xusb.h software in the USB driver are not working correctly (Xilinx Answer 32417) 11 EDK, xps_iic v2.00.a - The specification does not meet the 300 ns hold time from SCL to SDA (Xilinx Answer 32419) 11 EDK, xps_ll_fifo_v1_00_a - The XPS_LL_FIFO eop_n does not function correctly (Xilinx Answer 32398) 11 EDK, xps_timer_v1_00_a - Registers are not initialized to '0' after core reset (Xilinx Answer 32404) 11 EDK, xps_usb2_device - Mass Storage example does not work when the USB device is configured with NO DMA option (Xilinx Answer 18831) 11 EDK - What is the purpose of the PHDRS section and the HDR lines in a linker script? (Xilinx Answer 23952) 11 NGDBuild - Adding a "system.xmp" file to my project as a submodule source results in: "Failed to process BMM file edkBmmFile.bmm" (Xilinx Answer 32713) 11.2 EDK, XPS_LL_TEMAC_v2.02.a - Recommended constraints for the XPS_LL_TEMAC systems (Xilinx Answer 32840) 11.2 EDK XPS_LL_TEMAC_v2_02_a - The constraints are not backward compatible with v2.00.a of the core (Xilinx Answer 32968) 11.1 EDK - GCC compile error: undefined reference to `outbyte' (Xilinx Answer 32941) 11.1 EDK PPC405 OCM ISCNTL and DSCNTL are not set correctly when the clock ratio is 2:1 (Xilinx Answer 32857) 11 EDK - Which simulators are supported in EDK version 11? (Xilinx Answer 32967) 11.2, 11.1 EDK, xps_most_nic_v1_01_a - Netlist Simulation fails due to a synthesis issue for Spartan-6 devices (Xilinx Answer 33004) 11 EDK - Why does XMD issue the error "Debug Memory Access Check Failed"? (Xilinx Answer 33012) 11.1 EDK - ISE software adding an "-lp ?" switch to EDK's system_incl.make (Xilinx Answer 33011) 11 EDK - How do I configure a VxWorks image to work with a memory at a non-zero address? (Xilinx Answer 33105) 11 EDK - Flashwriter hangs when writing a very large file (larger than 2 MB) to a flash device. (Xilinx Answer 33058) 11 EDK - Why does the NFS file read fail for file sizes bigger than the MTU size in VxWorks for the EmacLite Core? (Xilinx Answer 33044) 11 EDK - Flashwriter is unable to successfully query target part layout using CFI on the ML510 board (Xilinx Answer 33075) 11 EDK, XAPP1026 - Error generating the "image.mfs" file (Xilinx Answer 32951) 11.2 EDK, xps_usb_host_v1_00_a - Where is the driver for the XPS USB Host Controller? (Xilinx Answer 33102) 11.1 EDK, uartns550_v1_12_a - The UartNs550 driver (version v1_12_a) does not work when an external clock (xin) is used (Xilinx Answer 32926) 11.2 EDK, microblaze_v7_20_a - When booting BlueCat Linux, the kernel reports an instruction bus exception in MicroBlaze processor (Xilinx Answer 32054) XPS_LL_TEMAC_v1_01 - INFO:coreutil - License for component <xps_ll_temac_v1> not found (Xilinx Answer 33119) 11.1 EDK, ppc440mc_ddr2 - DDR2 200 microseconds initialization time violated when TREFI is less than 7.8 microseconds (Xilinx Answer 33133) 11 EDK - How do I use symbols to pass variables to use in C source code? (Xilinx Answer 33291) 11.2 EDK - XPS_LL_TEMAC fails to implement in SGMII mode on Virtex-5 LX20T, FX20T and SX20T devices (Xilinx Answer 33156) 11.2 EDK, XPS_LL_TEMAC_v2_02_a - The first byte of Transmit destination address is duplicated once on every transfer (Xilinx Answer 33267) 11 EDK - Why does a warning dialog appear when I exit XPS on my Linux 64-bit system? (Xilinx Answer 33359) 11 EDK - How can I get Asian characters to work in SDK? (Xilinx Answer 33223) 11 EDK - ERROR:PhysDesignRules:1690 - Incomplete PLL_ADV to PCC440 programming. (Xilinx Answer 33270) 11 EDK - How do I download a bitstream through XMD? (Xilinx Answer 33318) 11 EDK - SDK does not launch from my Linux workstation (Xilinx Answer 33269) 11 EDK - Potential conflicts between Cygwin and McAfee (Xilinx Answer 33539) 11 EDK - What is the default port for the IPCPORT in XMD? (Xilinx Answer 33503) 11 EDK - The command line compilation of VxWorks BSP for diab results in "error (dcc:1598): no matching asm pattern exists" (Xilinx Answer 33396) 11 EDK - ERROR:Xst:2647 - Failed to run core generator for .... (Xilinx Answer 33145) 11 EDK - "ERROR:EDK:721 - Can't copy file D:\project\testcase\system.mhs when using xps_archiver" (Xilinx Answer 33844) 11.4 - Why doesn't my VxWorks 6.5 image come up from a warm reboot? (Xilinx Answer 33324) 11.2 EDK, XPS_MCH_EMC - MicroBlaze hangs when C_DCACHE_ALWAYS_USED=1 (Xilinx Answer 33880) 11 EDK - What is the interrupt sensitivity of the XPS Timer (xps_timer_v1_01_b) core? (Xilinx Answer 33300) 11.1 EDK, MPMC v5.00.a - SDMA hangs when using narrow external memory widths (Xilinx Answer 33550) 11 EDK - Flashwriter does not program dual-die flash parts (Xilinx Answer 33544) 11.2 EDK, MPMC v5.02.a - MPMC GUI incorrectly forces C_ARB0_NUM_SLOTS to 10 or 12 in Spartan-3 families (Xilinx Answer 33543) 11.1 EDK, MPMC v5.02.a - VFBC Read FIFO misses data beat when VFBC<Port_Num>_Rd_Empty = '1' (Xilinx Answer 33542) 11.1 EDK, MPMC v5.00.a - 32-bit wide VFBC write FIFO corrupts data and asserts incorrect VFBC_Wd_Full (Xilinx Answer 33541) 11.2 EDK, MPMC 5.02.a - VFBC cannot be set to read-only or write-only mode in the Spartan-6 MPMC GUI (Xilinx Answer 33536) 11.1 EDK/XPS, MPMC v5.03.a - XPS System Assembly view does not show NPI port #3 in Bus Interfaces tab (Xilinx Answer 33385) 11.2 EDK, MPMC v5.02.a - Single PLB memory writes corrupted in Spartan-6 (Xilinx Answer 33329) 11.2 EDK, MPMCv5.02.a - "ERROR:PhysDesignRules - Dangling pins on block... the use of attribute DATA_RATE_OQ set DDR requires connectivity for the CLK0 and CLK1 input pins." (Xilinx Answer 33128) 11.1 EDK, MPMC v5.00.a - PPC405 hangs when access occurs outside of the range of the MPMC with unconnected IPLB0 (Xilinx Answer 33119) 11.1 EDK, ppc440mc_ddr2 - DDR2 200 microseconds initialization time violated when TREFI is less than 7.8 microseconds (Xilinx Answer 33132) 11.1i EDK, MPMC v5.02.a - MPMC does not work after changing memory to MT16HTF25664H-667 (Xilinx Answer 31899) 10.1 EDK, MPMC v4.00.a - SDR SDRAM PHY misses first data value, fails under higher clock rates (Xilinx Answer 31448) 10.1 EDK, MPMC v4.00.a - What is the maximum memory size that MPMC supports? (Xilinx Answer 33906) 11 EDK - Why doesn't my custom IP automatically re-synthesize? (Xilinx Answer 33924) 11.4 EDK - How come my TFT controller does not get assigned its driver? (Xilinx Answer 33926) 11 EDK - Why don't any of my extra compiler flags that I add in XPS work?
Issues Resolved in 11.2: (Xilinx Answer 24742) 11.1 EDK - Profiling with recursive functions reports an incorrect number of calls to the functions (Xilinx Answer 32337) 11.1 EDK - When stepping passed mfmsr and mtmsr commands, the MSR value is incorrect (Xilinx Answer 32309) 11 EDK - My newly created driver is not available for use in SDK (Xilinx Answer 32271) 11.1 EDK - PlatGen has encountered a problem and needs to close (Xilinx Answer 32293) 11.1 EDK - Why does XPS not launch when I double-click the XPS Desktop icon? (Xilinx Answer 32264) 11.1 EDK - A Xilinx application has encountered an unexpected error (Xilinx Answer 32311) 11.1 EDK - Why does TEMAC not work after creating my design from Base System Builder? (Xilinx Answer 32349) 11.1 EDK - The ML506 board does not have the PHY interrupt pin connected (Xilinx Answer 32294) 11.1 EDK - SDK setup script defines $PATH twice (Xilinx Answer 32549) 11.1 EDK - Error "Invalid hardware Specification file" (Xilinx Answer 32621) 11.1 EDK - XMD shows "Processor stop condition unknown" when debugging MicroBlaze 7.20+ applications in SDK (Xilinx Answer 32785) 11 EDK - java.lang.RuntimeException thrown when working with SDK (Xilinx Answer 32698) 11 EDK - When I select 300 MHz for my PowerPC on the ML507 board, the cross bar clock (CPMINTERCONNECTCLK) is also at 300 MHz (Xilinx Answer 32792) 11 EDK - Export Hardware Design to SDK does not detect Global Peripheral Repository (Xilinx Answer 32292) 11.1 EDK - Why does XPS archiver hang when I run it? (Xilinx Answer 32338) 11.1 EDK - A multi-MicroBlaze processor system with the xps_mutex core hangs (Xilinx Answer 32272) 11.1 EDK - "ERROR:Pack:1653 - At least one timing constraint is impossible to meet - PowerPC 440 design with FPU" (Xilinx Answer 32607) 11.1 EDK - How do I set up my peripherals in VxWorks to use Real Time Process (RTP) projects? (Xilinx Answer 31885) 11.1 EDK - Is there a better way to manage my memory resources when I select VxWorks as my embedded operating system? (Xilinx Answer 31562) 11.1 EDK - The XLlDma driver (version v1_01_a and later) does not work with SDMA in a PPC440 system, when HDMA is enabled in the design (Xilinx Answer 32735) 11.1 EDK, MPMC - MPMC VFBC results in horizontally shifting video (Xilinx Answer 32734) 11.1 EDK, MPMC v5.00.a - VFBC Rd_Empty signal does not assert correctly, causing data loss (Xilinx Answer 32736) 11.1 EDK, MPMCv5.00.a - What is the depth of the MPMC NPI SRL FIFOs? (Xilinx Answer 32749) 11.1 EDK, MPMC v5.00.a - MPMC SDMA does not function "dummy" buffer descriptors (Xilinx Answer 32775) 11.1 EDK, MPMC v5.00.a - MPMC MIG "Update Design" flow does not update UCF in integrated XPS GUI flow (Xilinx Answer 32841) 11.2 EDK, fsl_v20_v2_11_a - FSL V20 core doesn't handle fifo sizes which is not 2^n. (Xilinx Answer 31449) 10.1 EDK, ppc440mc_ddr2 - tRFC is violated during calibration (Xilinx Answer 31450) 10.1 EDK, ppc440mc_ddr2 - Calibration hangs in stage 3 during simulation (Xilinx Answer 32696) 11.1 EDK, PPC440MC_DDR2 - Long runtimes in NGDBUILD when using ppc440mc_ddr2 (Xilinx Answer 32697) 11.1 EDK, PPC440MC_DDR2 - How many memory ranks does the PPC440MC_DDR2 controller support? (Xilinx Answer 32322) 10.1 EDK SP3, FSL_v20_2_11_a - Data is lost occasionally in a synchronous block RAM implementation (Xilinx Answer 30791) 11.1 EDK - MicroBlaze multi-processors do not appear to be communicating to each other (Xilinx Answer 32329) 11.2 EDK, xps usb2 device - USB Mass storage example is not working on MicroBlaze systems with Cache disabled and with DMA enabled in the USB Core (Xilinx Answer 32227) 11.1 EDK, xps_ll_temac_v2_00_a - Tactical Patch to simulate Virtex-4 hard TEMAC block (Xilinx Answer 32317) 10.1 EDK SP3, XPS_LL_TEMAC_v1_01_b - Local Link Implementation of the TEMAC transmit interface is incorrect (Xilinx Answer 32382) 11.1 EDK, xps_ll_temac_v2_00_a - TEMAC Extended Multicast filtering occasionally accepts packet that should be dropped
Issues Resolved in 11.3: (Xilinx Answer 32858) 11 EDK - When I attempt to suspend or terminate a debug session in SDK, a Suspend Error window appears (Xilinx Answer 32789) 11 EDK - Why am I unable to create a software project via command line on my Linux computer? (Xilinx Answer 33001) 11 EDK - Why does SDK issue warnings about powerpc-eabi-gcc compiler being used in my MicroBlaze processor? (Xilinx Answer 32787) 11 EDK - "ERROR:EDK:2347 - Section .text located at address 0x11C00000 does not map to any memory found in the hardware design" (Xilinx Answer 33006) 11.1 EDK - SREC error while trying to program flash in SDK "Error: SREC line is corrupted" (Xilinx Answer 31409) 11.1 EDK - Why does my software application still use software libraries for double precision floating point numbers, even though I have enabled the FPU and all of my functions and numbers are single precision types? (Xilinx Answer 32788) 11.2 EDK - "ERROR:EDK:1602 - IPNAME:ppc405_virtex4 INSTANCE:ppc405_0 .. not supported for architecture 'virtex5fx'!" (Xilinx Answer 33002) 11 EDK - XMD does not disassemble MicroBlaze processor floating point instructions correctly (Xilinx Answer 33068) 11 EDK - Why does SDK hang while it is communicating with the FPGA? (Xilinx Answer 33129) 11.2 EDK - "ERROR:Bitgen:38 - Unknown command line option "M1Pin"." (Xilinx Answer 32265) 11.1 EDK - "WARNING:EDK:2101 - PORT:Peripheral_Reset CONNECTOR:sys_periph_reset - C:\Data\EDK\bsb_ml507_l27\system.mhs line 462 - floating connection!" (Xilinx Answer 32700) 11 EDK - MicroBlaze processor appears to have stalled when trying to load its SVF file (Xilinx Answer 32782) 11 EDK - XPS Archiver does not archive settings of the MPMC Core (Xilinx Answer 33003) 11 EDK - gmake: *** No rule to make target `implementation/system_bd.bmm', needed by `SDK_Export/hw/system_bd.bmm'. (Xilinx Answer 32731) 11 EDK - The indices are not what I would expect for the MPMC when I change from the default data width to a lower data width (Xilinx Answer 32623) 11.1 EDK - BSP generated for MontaVista 5.0.24 kernel fails to boot (Xilinx Answer 33324) 11.2 EDK, XPS_MCH_EMC - MicroBlaze processor hangs when C_DCACHE_ALWAYS_USED=1 (Xilinx Answer 32803) 11.2 & 11.1 EDK, xps_mailbox_v1_00_a - Mailbox core fails in timing when 2 PLBv46 buses are running at different clock speeds (Xilinx Answer 33057) 11.2 EDK XPS_LL_TEMAC_v2_02_a - The Configure IP GUI does not allow selection of Hard TEMAC for Virtex-6 FPGA (Xilinx Answer 33013) 11.1 EDK, XPS_LL_TEMAC_v2_00_a - The evaluation timer for the Soft TEMAC does not get disabled although a Full License has been purchased (Xilinx Answer 33014) 11.2 EDK, XPS_LL_TEMAC v2.02.a - The evaluation timer for the Soft TEMAC does not get disabled although a Full License has been purchased (Xilinx Answer 33290) 11.2 EDK - "WARNING:Place:971 - A GCLK / GCLK clock component pair have been found that are not placed at an optimal GCLK / GCLK site pair..." (Xilinx Answer 32750) 11.1 EDK, MPMC v5.00.a - MPMC PLB ports show coherency issue, data read before fully written (Xilinx Answer 32665) 11.1 EDK, MPMC v5.00.a - Write data corrupted when using SDR SDRAM with ECC (Xilinx Answer 32861) 11.2 EDK, MPMC v5.02.a - "ERROR:EDK:3193 C_MEM_PARTNO (mpmc) The parameter C_MEM_PARTNO=<part> is not found in the memory database" (Xilinx Answer 32812) 11 EDK - "ERROR:EDK:1555 - IPNAME:mpmc INSTANCE:DDR2_SDRAM PORT:SDMA1_Clk - mpmc_v2_1_0.mpd line 1078 - ASSIGNMENT=REQUIRE..." (Xilinx Answer 32751) 11.1 EDK, MPMC v4.00.a - error: 'XPAR_DDR2_SDRAM_MPMC_HIGHADDR' undeclared here (not in a function)* (Xilinx Answer 33132) 11.1i EDK, MPMC v5.02.a - MPMC does not work after changing memory to MT16HTF25664H-667 (Xilinx Answer 33404) 11.3 EDK, plbv46_pcie_v4_01_a - The Virtex-6 device end point bridge incorrectly sets the NBE interrupt when receiving zero length writes. (Xilinx Answer 33406) 11.3 EDK, plbv46_pcie_v4_01_a - The Slave Unexpected Completion (SUC) interrupt is not set after receiving unexpected Cpl packet (Xilinx Answer 33408) 11.3 EDK, plbv46_pcie_v4_01_a - In the following sequence, the PLBv46_PCI EP Bridge does not complete the PLB to PCIe write request and hangs the bus (Xilinx Answer 33399) 11 EDK - Interrupts are not received when the transmit pong buffers are configured in the xps_ethernetlite_v3_00_a version of the core
Issues Resolved in 11.4: (Xilinx Answer 32784) 11 EDK - Why is data not sent through my PCI card on my ML510 / ML410 system? (Xilinx Answer 33444) 11 EDK - MontaVista Linux 4.01 SPI adapter does not work for driver versions spi_v1_12_a and later (Xilinx Answer 33467) 11 EDK - My Linux kernel will not compile. Why? (Xilinx Answer 33445) 11 EDK - Why is my VxWorks ROM boot image unable to load? (Xilinx Answer 32806) 11 EDK - How do I make the Clock Generator output port external? (Xilinx Answer 33339) 11 EDK - ERROR:EDK:2905 - Invalid property 'C_NUM_DCM' added in MHS (Xilinx Answer 33605) 11 EDK - I cannot connect to the processor on my ML40x board. Why? (Xilinx Answer 33271) 11 EDK - When I set the simulator path, the Cygwin mounted drive is used instead of the normal Windows drive (Xilinx Answer 33387) 11 EDK - Why does Flashwriter not work on my Spartan-3A DSP 3400A board? (Xilinx Answer 33645) 11 EDK - Why does the xilflash library not work with the new (65 nm) Numonyx flash devices (P30TF)? (Xilinx Answer 33341) 11.3 EDK - ERROR:EDK - Error calling proc < ... >: can't read "strMainClkPortName": no such variable (Xilinx Answer 33501) 11.3 EDK - Command line compilation of VxWorks results in "undefined reference to `vxbDrvVerCheck" error (Xilinx Answer 33374) 11.3 EDK - Why am I unable to change the Number of FSL Links and Select PLB Interface parameters on the Interrupt and Reset tab for the MicroBlaze processor? (Xilinx Answer 33383) 11.1 EDK, MPMC - PPC405 processor hangs without exception when illegal address requested and no PLB0 logic attached (Xilinx Answer 33535) 11.1 EDK, PPC440MC_DDR2 - "ERROR:Pack:2811 - Directed packing was unable to obey the user design constraints (LOC=PPC440_X0Y0)..." (Xilinx Answer 33379) 11.1 EDK, ppc440mc_ddr2 v2.00.b - How do I use more than 4 output clocks? (Xilinx Answer 33354) 11.3 EDK - ML510 Timing error on NET "Ethernet_MAC/Ethernet_MAC/phy_tx_clk_i" MAXSKEW = 5 ns; (Xilinx Answer 33602) 11.1 EDK, XPS_LL_TEMAC_v2.00.a - The minimum memory map size required for the TEMAC is 512K (Xilinx Answer 33540) 11.3 EDK - ** Error: xps_insystem_flash.vhd(93): Library xps_spi_v2_01_a not found. (Xilinx Answer 33825) 11.4 EDK - Bug fixes in MicroBlaze 7.20.d (Xilinx Answer 33955) 11 EDK - Why can I not get the correct driver version for the xps_hwicap_v3_00_a?