AR# 33034

11.x XST - The value "-" of std_logic type is interpreted differently by XST for Virtex-6 and Spartan-6 devices

描述

XST for Virtex-6 and Spartan-6 devices interprets the '-' value of std_logic type differently than when I target older devices. Why?

解决方案

XST for older devices interprets the '-' value of std_logic type as a "don't care" value. In the following example, XST interprets '-' in the sel = "1-" as "don't care":

File: ex_0011.vhd

Compilation Library: work

library ieee;

use ieee.std_logic_1164.all;

entity ex_0011 is

port(sel: in std_logic_vector(1 downto 0);

res: out std_logic

);

end ex_0006;

architecture bhv of ex_0006 is

begin

res <= '1' when sel = "1-" else '0';

end;

As the consequence, XST Standard generates the following netlist:

XST interpretation of above code for older devices
XST interpretation of above code for older devices

In 11.2, XST introduced a new VHDL/Verilog parser for Virtex-6 and Spartan-6 families. For more information on this change, see(Xilinx Answer 32927).

XST for Virtex-6 and Spartan-6 families does not interpret '-' as a "don't care" value, and therefore, the sel = "1-" expression is evaluated as False and the XST generates the following netlist. This is compliant with VHDL LRM.

XST interpretation of above code for Virtex-6 and Spartan-6
XST interpretation of above code for Virtex-6 and Spartan-6

You can use the std_match function from numeric_std package to interpret '-' value as "don't care" in the sel = "1-" expression.

File: ex_0011.vhd

Compilation Library: work

library ieee;

use ieee.std_logic_1164.all;

use ieee.numeric_std.all;

entity ex_0011 is

port(sel: in std_logic_vector(1 downto 0);

res: out std_logic

);

end ex_0006;

architecture bhv of ex_0006 is

begin

res <= '1' when std_match(sel,"1-") else '0';

end;

In this case, the implementation will look like the parser implementation for older devices.

AR# 33034
日期 12/15/2012
状态 Active
Type 综合文章