AR# 3359


IBIS Simulation - What information do IBIS models provide? What is not provided?


What information do IBIS models provide? What information is not provided?


IBIS models provide information about I/O driver and receiver characteristics without disclosing proprietary knowledge of the IC design (as unencrypted SPICE models do). However, there are some limitations on the information that IBIS models can provide. Please note that these are limitations imposed by the IBIS specification itself.

IBIS models provide the following information:

1. Model best-case and worst-case IC conditions (best-case = strong transistors, low temperature, high voltage; worst-case = weak transistors, high temperature, low voltage). Best-case conditions are represented by the "fast/strong" model, while worst-case conditions are represented by the "slow/weak" model. Typical behavior is represented by the "typical" model.

2. Model varying drive strength and slew rate conditions for Xilinx I/Os that support such variation.

IBIS models do not provide the following information:

1. Internal timing information (propagation delays and skew).

2. Power and ground structures.

3. Pin-to-pin coupling.

4. Detailed package parasitic information. Package parasitics are provided in the form of lumped RLC data. This is typically not a significant limitation, as package parasitics have an almost negligible effect on signal transitions.

The implications of 2 and 3 above are that ground bounce, power supply droop, and simultaneous switching output (SSO) noise CANNOT be simulated with IBIS models. To ensure that these effects do not harm the functionality of your design, Xilinx provides device/package-dependent SSO guidelines based on extensive lab measurements. The location of these guidelines is as follows:

All Xilinx Data Sheets and User Guides

Find the Xilinx data sheet or user guide for the device you are interesting in at:

I/O Application Notes

Find the Xilinx Application Notes for I/O and other topics at:
Click the Doc Type tab and select Application Notes.

IBIS Model White Paper

For a white paper on IBIS Model Usage for Virtex-4, Virtex-5, and Spartan-3 FPGAs, go to:

Using IBIS Models for Spartan-3 FPGAs

For an application note on using IBIS models with Spartan-3 FPGAs only, go to:

For more information and to find IBIS models for Xilinx devices, go to:
Click the Device Models tab.



Answer Number 问答标题 问题版本 已解决问题的版本
50653 SelectIO Design Assistant: IBIS Models & Simulation - IBIS Model Background N/A N/A
52539 Zynq-7000 SoC - Board Design N/A N/A
AR# 3359
日期 12/15/2012
状态 Active
Type 综合文章
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