The MIG tool does not allow me to select multiple controllers for DDR2. Is it possible to interface to more than one DDR2?
NOTE: This Answer Record is part of the Xilinx MIG Solution Center (Xilinx Answer 34243). The Xilinx MIG Solution Center is available to address all questions related to MIG. Whether you are starting a new design with MIG or troubleshooting a problem, use the MIG Solution Center to guide you to the right information.
The focus for multi-controller solutions in Virtex-6 devices is on DDR3 and QDRII+ due to demand. It is possible to place more than one DDR2 controller on a Virtex-6 device, however, the MIG GUI does not support automatic placement of more than one DDR2 controller. You must go through the GUI for each controller, specifying different banks for each controller and then combine the outputs into a single project. The Virtex-6 FPGA design does not allow sharing banks of DDR groups across multiple controllers. Therefore, separate banks must be selected.
Related Articles:
(Xilinx Answer 33268) - Sharing MMCMs
(Xilinx Answer 34267) - Sharing Banks across multiple controllers
| Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
|---|---|---|---|
| 34327 | MIG Virtex-6 DDR2/DDR3/QDRII+ - Multi-Controllers | N/A | N/A |
| 33268 | MIG Virtex-6 DDR2/DDR3 - Is it possible to combine MMCMs to save MMCM resources in multi-controller designs? | N/A | N/A |
| 34267 | MIG v3.2-3.4 Virtex-6 DDR3 - Can banks be shared between multiple memory controllers? | N/A | N/A |