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AR# 35594

12.1 EDK - The Spartan-6 SP605 board contains an incorrect clock pin location for the PCIe core

描述

The Spartan-6 FPGA SP605 board contains an incorrect pin location for the PCIe core.

解决方案


Download and unzip the new SP605 fileXilinx_SP605_v2_2_0.zip, and replace the old onein the < XILINX_EDK >\board\Xilinx\boards\Xilinx_SP605\data directory.
This issue is resolved in 12.2.

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
34609 12.x EDK - 主要问答记录列表 N/A N/A
35593 12.1 EDK - What patches are currently available for EDK? N/A N/A
AR# 35594
日期 12/15/2012
状态 Active
Type 综合文章
Tools
  • EDK - 12.1
Boards & Kits
  • Spartan-6 FPGA SP605 Evaluation Kit
的页面